Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.

Original-commit: 0df4b801a34697f2058b4a7b95e08d2a0576c9db
2013-10-10 10:17:27 -07:00
commit c91b74de33
488 changed files with 281740 additions and 0 deletions
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+//
+// Copyright 2011 Ettus Research LLC
+//
+
+
+
+
+module ram_2port
+  #(parameter DWIDTH=32,
+    parameter AWIDTH=9)
+    (input clka,
+     input ena,
+     input wea,
+     input [AWIDTH-1:0] addra,
+     input [DWIDTH-1:0] dia,
+     output reg [DWIDTH-1:0] doa,
+     
+     input clkb,
+     input enb,
+     input web,
+     input [AWIDTH-1:0] addrb,
+     input [DWIDTH-1:0] dib,
+     output reg [DWIDTH-1:0] dob);
+   
+   reg [DWIDTH-1:0] ram [(1<<AWIDTH)-1:0];
+   /*
+   integer 	    i;
+   initial
+     for(i=0;i<(1<<AWIDTH);i=i+1)
+       ram[i] <= {DWIDTH{1'b0}};
+       */
+   
+   always @(posedge clka) begin
+      if (ena)
+        begin
+           if (wea)
+             ram[addra] <= dia;
+           doa <= ram[addra];
+        end
+   end
+   always @(posedge clkb) begin
+      if (enb)
+        begin
+           if (web)
+             ram[addrb] <= dib;
+           dob <= ram[addrb];
+        end
+   end
+endmodule // ram_2port