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Remove FSRU-related files

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The FSRU (aka EISCAT) was never supported in UHD 4.0. The FPGA
repository never had the relevant files, and the block controller also
never existed. This removes all the corresponding files from MPM, as
well as some references from makefiles.


Original-commit: ba00ff0cf5c0ced093e0be12b3006fe2f657a58a
This commit is contained in:
Martin Braun
2022-02-22 14:41:19 -06:00
committed by Aaron Rossetto
parent 3d3c75f74d
commit c38c6f1b3a
1 changed files with 0 additions and 1 deletions
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top/n3xx/setupenv.sh
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@@ -8,7 +8,6 @@ declare -A PRODUCT_ID_MAP
PRODUCT_ID_MAP["N300"]="zynq/xc7z035/ffg900/-2" PRODUCT_ID_MAP["N300"]="zynq/xc7z035/ffg900/-2"
PRODUCT_ID_MAP["N310"]="zynq/xc7z100/ffg900/-2" PRODUCT_ID_MAP["N310"]="zynq/xc7z100/ffg900/-2"
PRODUCT_ID_MAP["N320"]="zynq/xc7z100/ffg900/-2" PRODUCT_ID_MAP["N320"]="zynq/xc7z100/ffg900/-2"
PRODUCT_ID_MAP["EISCAT"]="zynq/xc7z100/ffg900/-2"
# Set default part for simulation # Set default part for simulation
export ARCH=zynq export ARCH=zynq