fpga: x400: bump FPGA compat version to 9.0

Original-commit: 85ef95fd85f5fdd0eb8b7792443bf3b9ce4728cf
This commit is contained in:
Max Köhler
2025-02-12 14:38:08 +01:00
committed by Jörg Hofrichter
parent 4ae2f8eb5e
commit c12766fd4d
3 changed files with 15 additions and 15 deletions
@@ -81,11 +81,11 @@
localparam FPGA_VERSION_SIZE = 7; localparam FPGA_VERSION_SIZE = 7;
localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD
localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD
localparam FPGA_CURRENT_VERSION_MINOR = 'h3; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR localparam FPGA_CURRENT_VERSION_MINOR = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h2; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR
localparam FPGA_CURRENT_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR localparam FPGA_CURRENT_VERSION_MAJOR = 'h9; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h9; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR
localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h23102410; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h25020611; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
// Enumerated type RF_CORE_100M_VERSION // Enumerated type RF_CORE_100M_VERSION
localparam RF_CORE_100M_VERSION_SIZE = 7; localparam RF_CORE_100M_VERSION_SIZE = 7;
@@ -81,11 +81,11 @@
localparam FPGA_VERSION_SIZE = 7; localparam FPGA_VERSION_SIZE = 7;
localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD
localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD
localparam FPGA_CURRENT_VERSION_MINOR = 'h3; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR localparam FPGA_CURRENT_VERSION_MINOR = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h2; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR
localparam FPGA_CURRENT_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR localparam FPGA_CURRENT_VERSION_MAJOR = 'h9; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR
localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h9; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR
localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h23102410; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h25020611; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
// Enumerated type RF_CORE_FULL_VERSION // Enumerated type RF_CORE_FULL_VERSION
localparam RF_CORE_FULL_VERSION_SIZE = 7; localparam RF_CORE_FULL_VERSION_SIZE = 7;
+5 -5
View File
@@ -3111,13 +3111,13 @@ endmodule
// <li> Oldest compatible version: @.VERSIONING_REGS_REGMAP..OLDEST_COMPATIBLE_VERSION // <li> Oldest compatible version: @.VERSIONING_REGS_REGMAP..OLDEST_COMPATIBLE_VERSION
// <li> Version last modified: @.VERSIONING_REGS_REGMAP..VERSION_LAST_MODIFIED // <li> Version last modified: @.VERSIONING_REGS_REGMAP..VERSION_LAST_MODIFIED
// </info> // </info>
// <value name="FPGA_CURRENT_VERSION_MAJOR" integer="8"/> // <value name="FPGA_CURRENT_VERSION_MAJOR" integer="9"/>
// <value name="FPGA_CURRENT_VERSION_MINOR" integer="3"/> // <value name="FPGA_CURRENT_VERSION_MINOR" integer="0"/>
// <value name="FPGA_CURRENT_VERSION_BUILD" integer="0"/> // <value name="FPGA_CURRENT_VERSION_BUILD" integer="0"/>
// <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR" integer="8"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR" integer="9"/>
// <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MINOR" integer="2"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_MINOR" integer="0"/>
// <value name="FPGA_OLDEST_COMPATIBLE_VERSION_BUILD" integer="0"/> // <value name="FPGA_OLDEST_COMPATIBLE_VERSION_BUILD" integer="0"/>
// <value name="FPGA_VERSION_LAST_MODIFIED_TIME" integer="0x23102410"/> // <value name="FPGA_VERSION_LAST_MODIFIED_TIME" integer="0x25020611"/>
// </enumeratedtype> // </enumeratedtype>
// </group> // </group>
//</regmap> //</regmap>