mpm/fpga: x4xx: Major updates in preparation for future devices

FPGA:
- Split up MB registers that control daughterboard specific settings so
  that daughterboards 0 and 1 could have different setings, in
  preparation for future devices that require different settings.
  This requires a compat number bump to 8.0.
- Add registers for additional RFDC information, including the
  block/tile mapping of the individual channels, and information about
  resampling capabilities
- Identify sections of code that would be specific to X410/ZBX and move
  them to their own headers, so it's trivial to add device-specific
  sections of code instead for other devices in the future.
  - This includes constraints for clocks and I/O pins.
- Remove ability to do timed ctrlport transactions to the MB CPLD, this
  was unused and possibly broken.
- Move daughterboard-specific code into its own code location
  (dboards/zbx)
- Move X410-specific register documentation to its own location
  (doc/X410)
- Refactor Makefiles to split out X410/ZBX specific components and allow
  switching between device types
- Add 512-bit AXI interconnects
- Make number of timekeepers configurable (X410 keeps the single
  timekeeper)

MPM:
- Required compat is bumped to 8.0
- Now supports new registers for detecting DSP capabilities and
  multi-rate settings for the daughterboards
- Adds MMCM controls (currently unused)

Co-authored-by: Wade Fife <wade.fife@ni.com>
Co-authored-by: Ryan Marlow <ryan@lmarlow.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>


Original-commit: c1d268917ea65dd9c5a42366014cb96d3c025223

top/x400/rf/common/rf_nco_reset.vhd

@@ -59,6 +59,13 @@ entity rf_nco_reset is
     cAdc0xNcoUpdateBusy     : in  std_logic;
     cAdc0xNcoUpdateReq      : out std_logic := '0';
 
+    -----------------------------------
+    --ADC Tile 225
+    -----------------------------------
+    -- ADC common NCO update controls and status.
+    cAdc1xNcoUpdateBusy     : in  std_logic;
+    cAdc1xNcoUpdateReq      : out std_logic := '0';
+
     -----------------------------------
     --ADC Tile 226
     -----------------------------------
@@ -66,6 +73,13 @@ entity rf_nco_reset is
     cAdc2xNcoUpdateBusy     : in  std_logic;
     cAdc2xNcoUpdateReq      : out std_logic := '0';
 
+    -----------------------------------
+    --ADC Tile 227
+    -----------------------------------
+    -- ADC common NCO update controls and status.
+    cAdc3xNcoUpdateBusy     : in  std_logic;
+    cAdc3xNcoUpdateReq      : out std_logic := '0';
+
     -- NCO reset can be initiated only when cNcoPhaseRst is set to '1' and
     -- cNcoUpdateEn = 0x20. The FSM in this entity will set these values when
     -- an NCO reset is initiated during synchronization. These ports are common
@@ -146,7 +160,9 @@ begin
       cDac0xSysrefIntReenable <= '0';
       cDac1xNcoUpdateReq      <= '0';
       cAdc0xNcoUpdateReq      <= '0';
+      cAdc1xNcoUpdateReq      <= '0';
       cAdc2xNcoUpdateReq      <= '0';
+      cAdc3xNcoUpdateReq      <= '0';
       case cResetState is
         -- Stay in this state until NCO reset sequence is initiated. NCO reset
         -- is initiated only on the rising edge of SYSREF.
@@ -177,7 +193,9 @@ begin
             cResetState <= CheckUpdateDone;
             cDac1xNcoUpdateReq <= '1';
             cAdc0xNcoUpdateReq <= '1';
+            cAdc1xNcoUpdateReq <= '1';
             cAdc2xNcoUpdateReq <= '1';
+            cAdc3xNcoUpdateReq <= '1';
           end if;
 
         -- In this state, we check if the RFDC block is ready for NCO reset.
@@ -187,7 +205,8 @@ begin
           cSysrefIntGating <= '1';
           cResetState <= CheckUpdateDone;
           if cDac0xNcoUpdateBusy = "10" and  cAdc0xNcoUpdateBusy = '0' and
-             cAdc2xNcoUpdateBusy = '0'  and  cDac1xNcoUpdateBusy = '0'  and
+             cAdc1xNcoUpdateBusy = '0' and cAdc2xNcoUpdateBusy = '0' and
+             cAdc3xNcoUpdateBusy = '0' and  cDac1xNcoUpdateBusy = '0'  and
              cSysref = '1' and cSysrefDlyd = '0' then
             cDac0xSysrefIntReenable <= '1';
             cResetState <= CheckResetDone;