fpga: lib: Upgrade to Vivado 2021.1

Original-commit: b0dc0faed1eceef3ba28ce03555658fca2423c46
This commit is contained in:
Sam O'Brien
2022-08-25 13:55:30 -05:00
committed by skooNI
parent f53e3f27fc
commit a63c80bd23
24 changed files with 543 additions and 177 deletions
+37 -27
View File
@@ -1,41 +1,51 @@
//
// Copyright 2016 Ettus Research, a National Instruments Company
// Copyright 2022 Ettus Research, a National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
#include "ap_axi_sdata.h"
#include "hls_stream.h"
#include <complex>
#include "ap_int.h"
struct axis_cplx {
std::complex<short int> data;
ap_uint<1> last;
};
typedef std::complex<short int> axis_data;
typedef hls::axis<axis_data, 0, 0, 0> trans_pkt;
// AXI-Stream port type is compatible with pointer, reference, & array input / ouputs only
// See UG902 Vivado High Level Synthesis guide (2014.4) pg 157 Figure 1-49
void addsub_hls (axis_cplx &a, axis_cplx &b, axis_cplx &add, axis_cplx &sub) {
void addsub_hls(hls::stream<trans_pkt>& a,
hls::stream<trans_pkt>& b,
hls::stream<trans_pkt>& add,
hls::stream<trans_pkt>& sub)
{
// Remove ap ctrl ports (ap_start, ap_ready, ap_idle, etc) since we only use the
// AXI-Stream ports
#pragma HLS INTERFACE ap_ctrl_none port = return
// Remove ap ctrl ports (ap_start, ap_ready, ap_idle, etc) since we only use the AXI-Stream ports
#pragma HLS INTERFACE ap_ctrl_none port=return
// Set ports as AXI-Stream
#pragma HLS INTERFACE axis port=sub
#pragma HLS INTERFACE axis port=add
#pragma HLS INTERFACE axis port=a
#pragma HLS INTERFACE axis port=b
// Need to pack our complex<short int> into a 32-bit word
// Otherwise, compiler complains that our AXI-Stream interfaces have two data fields (i.e. data.real, data.imag)
#pragma HLS DATA_PACK variable=sub.data
#pragma HLS DATA_PACK variable=add.data
#pragma HLS DATA_PACK variable=a.data
#pragma HLS DATA_PACK variable=b.data
// Set ports as AXI-Stream
#pragma HLS INTERFACE axis port = sub
#pragma HLS INTERFACE axis port = add
#pragma HLS INTERFACE axis port = a
#pragma HLS INTERFACE axis port = b
// Complex add / subtract
add.data.real() = a.data.real() + b.data.real();
add.data.imag() = a.data.imag() + b.data.imag();
sub.data.real() = a.data.real() - b.data.real();
sub.data.imag() = a.data.imag() - b.data.imag();
// Pass through tlast
add.last = a.last;
sub.last = a.last;
trans_pkt a_pkt;
a.read(a_pkt);
trans_pkt b_pkt;
b.read(b_pkt);
trans_pkt add_pkt;
add_pkt.data = {
a_pkt.data.real() + b_pkt.data.real(),
a_pkt.data.imag() + b_pkt.data.imag()};
add_pkt.last = a_pkt.last;
add.write(add_pkt);
trans_pkt sub_pkt;
sub_pkt.data = {
a_pkt.data.real() - b_pkt.data.real(),
a_pkt.data.imag() - b_pkt.data.imag()};
sub_pkt.last = a_pkt.last;
sub.write(sub_pkt);
}