fpga: lib: Fix simulation of axi_fir_filter

The always(*) block was never executing in some simulators because
there were no signals on the right-hand side in the block. Changing it
to an initial block ensures it always runs.


Original-commit: 0b965d579e2df962b91dac141eef6668f932e992
This commit is contained in:
Wade Fife
2021-04-09 17:26:59 -05:00
parent 4fa8a41e0b
commit a300408721
+1 -1
View File
@@ -116,7 +116,7 @@ module axi_fir_filter #(
end
// Coefficients are static
end else begin
always @(*) begin
initial begin
for (k = 0; k < NUM_SLICES; k = k + 1) begin
coeffs[k] <= COEFFS_VEC[COEFF_WIDTH*k +: COEFF_WIDTH];
coeff_load_stb <= 1'b1;