fpga: x400: zbx: Add support for ZBX CPLD
Co-authored-by: Cherwa Vang <cherwa.vang@ni.com> Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Max Köhler <max.koehler@ni.com> Co-authored-by: Paul Butler <paul.butler@ni.com> Original-commit: 99b841c75aa91709090cbf4046bf51b7ffb4f612
This commit is contained in:
Javier Valenzuela
committed by
Aaron Rossetto
Aaron Rossetto
co-authored by
Cherwa Vang
Martin Braun
Max Köhler
Paul Butler
Cherwa Vang
Martin Braun
Max Köhler
Paul Butler
parent
7e59e9516d
commit
a1d7c252c2
@@ -0,0 +1,81 @@
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//
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// Copyright 2021 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: atr_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// CURRENT_CONFIG_REG : 0x0 (atr_controller.v)
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// OPTION_REG : 0x4 (atr_controller.v)
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// SW_CONFIG_REG : 0x8 (atr_controller.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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//===============================================================================
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// Register Group ATR_REGISTERS
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//===============================================================================
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// Enumerated type ATR_OPTIONS
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localparam ATR_OPTIONS_SIZE = 3;
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localparam SW_DEFINED = 'h0; // ATR_OPTIONS:SW_DEFINED
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localparam CLASSIC_ATR = 'h1; // ATR_OPTIONS:CLASSIC_ATR
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localparam FPGA_STATE = 'h2; // ATR_OPTIONS:FPGA_STATE
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// CURRENT_CONFIG_REG Register (from atr_controller.v)
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localparam CURRENT_CONFIG_REG = 'h0; // Register Offset
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localparam CURRENT_CONFIG_REG_SIZE = 32; // register width in bits
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localparam CURRENT_CONFIG_REG_MASK = 32'hFFFFFFFF;
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localparam CURRENT_RF0_CONFIG_SIZE = 8; //CURRENT_CONFIG_REG:CURRENT_RF0_CONFIG
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localparam CURRENT_RF0_CONFIG_MSB = 7; //CURRENT_CONFIG_REG:CURRENT_RF0_CONFIG
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localparam CURRENT_RF0_CONFIG = 0; //CURRENT_CONFIG_REG:CURRENT_RF0_CONFIG
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localparam CURRENT_RF1_CONFIG_SIZE = 8; //CURRENT_CONFIG_REG:CURRENT_RF1_CONFIG
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localparam CURRENT_RF1_CONFIG_MSB = 15; //CURRENT_CONFIG_REG:CURRENT_RF1_CONFIG
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localparam CURRENT_RF1_CONFIG = 8; //CURRENT_CONFIG_REG:CURRENT_RF1_CONFIG
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localparam CURRENT_RF0_DSA_CONFIG_SIZE = 8; //CURRENT_CONFIG_REG:CURRENT_RF0_DSA_CONFIG
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localparam CURRENT_RF0_DSA_CONFIG_MSB = 23; //CURRENT_CONFIG_REG:CURRENT_RF0_DSA_CONFIG
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localparam CURRENT_RF0_DSA_CONFIG = 16; //CURRENT_CONFIG_REG:CURRENT_RF0_DSA_CONFIG
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localparam CURRENT_RF1_DSA_CONFIG_SIZE = 8; //CURRENT_CONFIG_REG:CURRENT_RF1_DSA_CONFIG
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localparam CURRENT_RF1_DSA_CONFIG_MSB = 31; //CURRENT_CONFIG_REG:CURRENT_RF1_DSA_CONFIG
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localparam CURRENT_RF1_DSA_CONFIG = 24; //CURRENT_CONFIG_REG:CURRENT_RF1_DSA_CONFIG
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// OPTION_REG Register (from atr_controller.v)
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localparam OPTION_REG = 'h4; // Register Offset
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localparam OPTION_REG_SIZE = 32; // register width in bits
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localparam OPTION_REG_MASK = 32'h3030303;
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localparam RF0_OPTION_SIZE = 2; //OPTION_REG:RF0_OPTION
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localparam RF0_OPTION_MSB = 1; //OPTION_REG:RF0_OPTION
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localparam RF0_OPTION = 0; //OPTION_REG:RF0_OPTION
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localparam RF1_OPTION_SIZE = 2; //OPTION_REG:RF1_OPTION
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localparam RF1_OPTION_MSB = 9; //OPTION_REG:RF1_OPTION
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localparam RF1_OPTION = 8; //OPTION_REG:RF1_OPTION
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localparam RF0_DSA_OPTION_SIZE = 2; //OPTION_REG:RF0_DSA_OPTION
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localparam RF0_DSA_OPTION_MSB = 17; //OPTION_REG:RF0_DSA_OPTION
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localparam RF0_DSA_OPTION = 16; //OPTION_REG:RF0_DSA_OPTION
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localparam RF1_DSA_OPTION_SIZE = 2; //OPTION_REG:RF1_DSA_OPTION
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localparam RF1_DSA_OPTION_MSB = 25; //OPTION_REG:RF1_DSA_OPTION
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localparam RF1_DSA_OPTION = 24; //OPTION_REG:RF1_DSA_OPTION
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// SW_CONFIG_REG Register (from atr_controller.v)
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localparam SW_CONFIG_REG = 'h8; // Register Offset
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localparam SW_CONFIG_REG_SIZE = 32; // register width in bits
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localparam SW_CONFIG_REG_MASK = 32'hFFFFFFFF;
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localparam SW_RF0_CONFIG_SIZE = 8; //SW_CONFIG_REG:SW_RF0_CONFIG
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localparam SW_RF0_CONFIG_MSB = 7; //SW_CONFIG_REG:SW_RF0_CONFIG
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localparam SW_RF0_CONFIG = 0; //SW_CONFIG_REG:SW_RF0_CONFIG
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localparam SW_RF1_CONFIG_SIZE = 8; //SW_CONFIG_REG:SW_RF1_CONFIG
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localparam SW_RF1_CONFIG_MSB = 15; //SW_CONFIG_REG:SW_RF1_CONFIG
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localparam SW_RF1_CONFIG = 8; //SW_CONFIG_REG:SW_RF1_CONFIG
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localparam SW_RF0_DSA_CONFIG_SIZE = 8; //SW_CONFIG_REG:SW_RF0_DSA_CONFIG
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localparam SW_RF0_DSA_CONFIG_MSB = 23; //SW_CONFIG_REG:SW_RF0_DSA_CONFIG
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localparam SW_RF0_DSA_CONFIG = 16; //SW_CONFIG_REG:SW_RF0_DSA_CONFIG
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localparam SW_RF1_DSA_CONFIG_SIZE = 8; //SW_CONFIG_REG:SW_RF1_DSA_CONFIG
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localparam SW_RF1_DSA_CONFIG_MSB = 31; //SW_CONFIG_REG:SW_RF1_DSA_CONFIG
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localparam SW_RF1_DSA_CONFIG = 24; //SW_CONFIG_REG:SW_RF1_DSA_CONFIG
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@@ -0,0 +1,75 @@
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//
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// Copyright 2021 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: basic_regs_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// SLAVE_SIGNATURE : 0x0 (basic_regs.v)
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// SLAVE_REVISION : 0x4 (basic_regs.v)
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// SLAVE_OLDEST_REVISION : 0x8 (basic_regs.v)
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// SLAVE_SCRATCH : 0xC (basic_regs.v)
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// GIT_HASH_REGISTER : 0x10 (basic_regs.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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//===============================================================================
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// Register Group BASIC_REGS_REGISTERS
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//===============================================================================
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// Enumerated type BASIC_REGISTERS_VALUES
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localparam BASIC_REGISTERS_VALUES_SIZE = 3;
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localparam BOARD_ID_VALUE = 'h4002; // BASIC_REGISTERS_VALUES:BOARD_ID_VALUE
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localparam OLDEST_CPLD_REVISION = 'h20110611; // BASIC_REGISTERS_VALUES:OLDEST_CPLD_REVISION
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localparam CPLD_REVISION = 'h21031009; // BASIC_REGISTERS_VALUES:CPLD_REVISION
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// SLAVE_SIGNATURE Register (from basic_regs.v)
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localparam SLAVE_SIGNATURE = 'h0; // Register Offset
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localparam SLAVE_SIGNATURE_SIZE = 32; // register width in bits
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localparam SLAVE_SIGNATURE_MASK = 32'hFFFF;
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localparam BOARD_ID_SIZE = 16; //SLAVE_SIGNATURE:BOARD_ID
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localparam BOARD_ID_MSB = 15; //SLAVE_SIGNATURE:BOARD_ID
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localparam BOARD_ID = 0; //SLAVE_SIGNATURE:BOARD_ID
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// SLAVE_REVISION Register (from basic_regs.v)
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localparam SLAVE_REVISION = 'h4; // Register Offset
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localparam SLAVE_REVISION_SIZE = 32; // register width in bits
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localparam SLAVE_REVISION_MASK = 32'hFFFFFFFF;
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localparam REVISION_REG_SIZE = 32; //SLAVE_REVISION:REVISION_REG
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localparam REVISION_REG_MSB = 31; //SLAVE_REVISION:REVISION_REG
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localparam REVISION_REG = 0; //SLAVE_REVISION:REVISION_REG
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// SLAVE_OLDEST_REVISION Register (from basic_regs.v)
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localparam SLAVE_OLDEST_REVISION = 'h8; // Register Offset
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localparam SLAVE_OLDEST_REVISION_SIZE = 32; // register width in bits
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localparam SLAVE_OLDEST_REVISION_MASK = 32'hFFFFFFFF;
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localparam OLDEST_REVISION_REG_SIZE = 32; //SLAVE_OLDEST_REVISION:OLDEST_REVISION_REG
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localparam OLDEST_REVISION_REG_MSB = 31; //SLAVE_OLDEST_REVISION:OLDEST_REVISION_REG
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localparam OLDEST_REVISION_REG = 0; //SLAVE_OLDEST_REVISION:OLDEST_REVISION_REG
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// SLAVE_SCRATCH Register (from basic_regs.v)
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localparam SLAVE_SCRATCH = 'hC; // Register Offset
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localparam SLAVE_SCRATCH_SIZE = 32; // register width in bits
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localparam SLAVE_SCRATCH_MASK = 32'hFFFFFFFF;
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localparam SCRATCH_REG_SIZE = 32; //SLAVE_SCRATCH:SCRATCH_REG
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localparam SCRATCH_REG_MSB = 31; //SLAVE_SCRATCH:SCRATCH_REG
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localparam SCRATCH_REG = 0; //SLAVE_SCRATCH:SCRATCH_REG
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// GIT_HASH_REGISTER Register (from basic_regs.v)
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localparam GIT_HASH_REGISTER = 'h10; // Register Offset
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localparam GIT_HASH_REGISTER_SIZE = 32; // register width in bits
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localparam GIT_HASH_REGISTER_MASK = 32'hFFFFFFFF;
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localparam GIT_HASH_SIZE = 28; //GIT_HASH_REGISTER:GIT_HASH
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localparam GIT_HASH_MSB = 27; //GIT_HASH_REGISTER:GIT_HASH
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localparam GIT_HASH = 0; //GIT_HASH_REGISTER:GIT_HASH
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localparam GIT_CLEAN_SIZE = 4; //GIT_HASH_REGISTER:GIT_CLEAN
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localparam GIT_CLEAN_MSB = 31; //GIT_HASH_REGISTER:GIT_CLEAN
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localparam GIT_CLEAN = 28; //GIT_HASH_REGISTER:GIT_CLEAN
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@@ -0,0 +1,58 @@
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//
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// Copyright 2021 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: db_control_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// ATR_CONTROLLER_REGS : 0x0 (zbx_top_cpld.v)
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// LO_CONTROL_REGS : 0x20 (zbx_top_cpld.v)
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// LED_SETUP_REGS : 0x400 (zbx_top_cpld.v)
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// SWITCH_SETUP_REGS : 0x1000 (zbx_top_cpld.v)
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// DSA_SETUP_REGS : 0x2000 (zbx_top_cpld.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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//===============================================================================
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// Register Group DB_CONTROL_WINDOWS
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//===============================================================================
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// ATR_CONTROLLER_REGS Window (from zbx_top_cpld.v)
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localparam ATR_CONTROLLER_REGS = 'h0; // Window Offset
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localparam ATR_CONTROLLER_REGS_SIZE = 'h20; // size in bytes
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// LO_CONTROL_REGS Window (from zbx_top_cpld.v)
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localparam LO_CONTROL_REGS = 'h20; // Window Offset
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localparam LO_CONTROL_REGS_SIZE = 'h3E0; // size in bytes
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// LED_SETUP_REGS Window (from zbx_top_cpld.v)
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localparam LED_SETUP_REGS = 'h400; // Window Offset
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localparam LED_SETUP_REGS_SIZE = 'hC00; // size in bytes
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// SWITCH_SETUP_REGS Window (from zbx_top_cpld.v)
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localparam SWITCH_SETUP_REGS = 'h1000; // Window Offset
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localparam SWITCH_SETUP_REGS_SIZE = 'h1000; // size in bytes
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// DSA_SETUP_REGS Window (from zbx_top_cpld.v)
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localparam DSA_SETUP_REGS = 'h2000; // Window Offset
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localparam DSA_SETUP_REGS_SIZE = 'h3000; // size in bytes
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//===============================================================================
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// Register Group REGISTER_ENDPOINTS
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//===============================================================================
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// Enumerated type REGISTER_BLOCKS
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localparam REGISTER_BLOCKS_SIZE = 5;
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localparam ATR_REGISTERS = 'h0; // REGISTER_BLOCKS:ATR_REGISTERS
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localparam LED_REGISTERS = 'h1; // REGISTER_BLOCKS:LED_REGISTERS
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localparam LO_SPI = 'h2; // REGISTER_BLOCKS:LO_SPI
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localparam SW_CONTROL = 'h3; // REGISTER_BLOCKS:SW_CONTROL
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localparam DSA_CONTROL = 'h4; // REGISTER_BLOCKS:DSA_CONTROL
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@@ -0,0 +1,162 @@
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//
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// Copyright 2021 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: dsa_setup_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// TX0_DSA_ATR : 0x0 (dsa_control.v)
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// TX1_DSA_ATR : 0x400 (dsa_control.v)
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// RX0_DSA_ATR : 0x800 (dsa_control.v)
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// RX1_DSA_ATR : 0xC00 (dsa_control.v)
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// TX0_DSA_TABLE_SELECT : 0x1000 (dsa_control.v)
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// TX1_DSA_TABLE_SELECT : 0x1400 (dsa_control.v)
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// RX0_DSA_TABLE_SELECT : 0x1800 (dsa_control.v)
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// RX1_DSA_TABLE_SELECT : 0x1C00 (dsa_control.v)
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// TX0_DSA_TABLE : 0x2000 (dsa_control.v)
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// TX1_DSA_TABLE : 0x2400 (dsa_control.v)
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// RX0_DSA_TABLE : 0x2800 (dsa_control.v)
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// RX1_DSA_TABLE : 0x2C00 (dsa_control.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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// DSA_TABLE_CONTROL Type (from dsa_control.v)
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localparam DSA_TABLE_CONTROL_SIZE = 32;
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localparam DSA_TABLE_CONTROL_MASK = 32'hFF;
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localparam TABLE_INDEX_SIZE = 8; //DSA_TABLE_CONTROL:TABLE_INDEX
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localparam TABLE_INDEX_MSB = 7; //DSA_TABLE_CONTROL:TABLE_INDEX
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localparam TABLE_INDEX = 0; //DSA_TABLE_CONTROL:TABLE_INDEX
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// RX_DSA_CONTROL Type (from dsa_control.v)
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localparam RX_DSA_CONTROL_SIZE = 32;
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localparam RX_DSA_CONTROL_MASK = 32'hFFFF;
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localparam RX_DSA1_SIZE = 4; //RX_DSA_CONTROL:RX_DSA1
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localparam RX_DSA1_MSB = 3; //RX_DSA_CONTROL:RX_DSA1
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localparam RX_DSA1 = 0; //RX_DSA_CONTROL:RX_DSA1
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localparam RX_DSA2_SIZE = 4; //RX_DSA_CONTROL:RX_DSA2
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localparam RX_DSA2_MSB = 7; //RX_DSA_CONTROL:RX_DSA2
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localparam RX_DSA2 = 4; //RX_DSA_CONTROL:RX_DSA2
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localparam RX_DSA3_A_SIZE = 4; //RX_DSA_CONTROL:RX_DSA3_A
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localparam RX_DSA3_A_MSB = 11; //RX_DSA_CONTROL:RX_DSA3_A
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localparam RX_DSA3_A = 8; //RX_DSA_CONTROL:RX_DSA3_A
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localparam RX_DSA3_B_SIZE = 4; //RX_DSA_CONTROL:RX_DSA3_B
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localparam RX_DSA3_B_MSB = 15; //RX_DSA_CONTROL:RX_DSA3_B
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localparam RX_DSA3_B = 12; //RX_DSA_CONTROL:RX_DSA3_B
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// TX_DSA_CONTROL Type (from dsa_control.v)
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localparam TX_DSA_CONTROL_SIZE = 32;
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localparam TX_DSA_CONTROL_MASK = 32'h1F1F;
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localparam TX_DSA1_SIZE = 5; //TX_DSA_CONTROL:TX_DSA1
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localparam TX_DSA1_MSB = 4; //TX_DSA_CONTROL:TX_DSA1
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localparam TX_DSA1 = 0; //TX_DSA_CONTROL:TX_DSA1
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localparam TX_DSA2_SIZE = 5; //TX_DSA_CONTROL:TX_DSA2
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localparam TX_DSA2_MSB = 12; //TX_DSA_CONTROL:TX_DSA2
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localparam TX_DSA2 = 8; //TX_DSA_CONTROL:TX_DSA2
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//===============================================================================
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// Register Group DSA_SETUP_REGISTERS
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//===============================================================================
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// TX0_DSA_ATR Register (from dsa_control.v)
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localparam TX0_DSA_ATR_COUNT = 256; // Number of elements in array
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// TX1_DSA_ATR Register (from dsa_control.v)
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localparam TX1_DSA_ATR_COUNT = 256; // Number of elements in array
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// RX0_DSA_ATR Register (from dsa_control.v)
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localparam RX0_DSA_ATR_COUNT = 256; // Number of elements in array
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// RX1_DSA_ATR Register (from dsa_control.v)
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localparam RX1_DSA_ATR_COUNT = 256; // Number of elements in array
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// TX0_DSA_TABLE_SELECT Register (from dsa_control.v)
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localparam TX0_DSA_TABLE_SELECT_COUNT = 256; // Number of elements in array
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// TX1_DSA_TABLE_SELECT Register (from dsa_control.v)
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localparam TX1_DSA_TABLE_SELECT_COUNT = 256; // Number of elements in array
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// RX0_DSA_TABLE_SELECT Register (from dsa_control.v)
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localparam RX0_DSA_TABLE_SELECT_COUNT = 256; // Number of elements in array
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// RX1_DSA_TABLE_SELECT Register (from dsa_control.v)
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localparam RX1_DSA_TABLE_SELECT_COUNT = 256; // Number of elements in array
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// TX0_DSA_TABLE Register (from dsa_control.v)
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localparam TX0_DSA_TABLE_COUNT = 256; // Number of elements in array
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// TX1_DSA_TABLE Register (from dsa_control.v)
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localparam TX1_DSA_TABLE_COUNT = 256; // Number of elements in array
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// RX0_DSA_TABLE Register (from dsa_control.v)
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localparam RX0_DSA_TABLE_COUNT = 256; // Number of elements in array
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// RX1_DSA_TABLE Register (from dsa_control.v)
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localparam RX1_DSA_TABLE_COUNT = 256; // Number of elements in array
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// Return the offset of an element of register array TX0_DSA_ATR
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function integer TX0_DSA_ATR (input integer i);
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TX0_DSA_ATR = (i * 'h4) + 'h0;
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endfunction
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// Return the offset of an element of register array TX1_DSA_ATR
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function integer TX1_DSA_ATR (input integer i);
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TX1_DSA_ATR = (i * 'h4) + 'h400;
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endfunction
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// Return the offset of an element of register array RX0_DSA_ATR
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function integer RX0_DSA_ATR (input integer i);
|
||||
RX0_DSA_ATR = (i * 'h4) + 'h800;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array RX1_DSA_ATR
|
||||
function integer RX1_DSA_ATR (input integer i);
|
||||
RX1_DSA_ATR = (i * 'h4) + 'hC00;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array TX0_DSA_TABLE_SELECT
|
||||
function integer TX0_DSA_TABLE_SELECT (input integer i);
|
||||
TX0_DSA_TABLE_SELECT = (i * 'h4) + 'h1000;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array TX1_DSA_TABLE_SELECT
|
||||
function integer TX1_DSA_TABLE_SELECT (input integer i);
|
||||
TX1_DSA_TABLE_SELECT = (i * 'h4) + 'h1400;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array RX0_DSA_TABLE_SELECT
|
||||
function integer RX0_DSA_TABLE_SELECT (input integer i);
|
||||
RX0_DSA_TABLE_SELECT = (i * 'h4) + 'h1800;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array RX1_DSA_TABLE_SELECT
|
||||
function integer RX1_DSA_TABLE_SELECT (input integer i);
|
||||
RX1_DSA_TABLE_SELECT = (i * 'h4) + 'h1C00;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array TX0_DSA_TABLE
|
||||
function integer TX0_DSA_TABLE (input integer i);
|
||||
TX0_DSA_TABLE = (i * 'h4) + 'h2000;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array TX1_DSA_TABLE
|
||||
function integer TX1_DSA_TABLE (input integer i);
|
||||
TX1_DSA_TABLE = (i * 'h4) + 'h2400;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array RX0_DSA_TABLE
|
||||
function integer RX0_DSA_TABLE (input integer i);
|
||||
RX0_DSA_TABLE = (i * 'h4) + 'h2800;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array RX1_DSA_TABLE
|
||||
function integer RX1_DSA_TABLE (input integer i);
|
||||
RX1_DSA_TABLE = (i * 'h4) + 'h2C00;
|
||||
endfunction
|
||||
@@ -0,0 +1,31 @@
|
||||
//
|
||||
// Copyright 2021 Ettus Research, A National Instruments Company
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
// Module: gpio_regmap_utils.vh
|
||||
// Description:
|
||||
// The constants in this file are autogenerated by XmlParse.
|
||||
|
||||
//===============================================================================
|
||||
// A numerically ordered list of registers and their HDL source files
|
||||
//===============================================================================
|
||||
|
||||
// BASE_WINDOW_GPIO : 0x0 (zbx_top_cpld.v)
|
||||
// DB_CONTROL_WINDOW_GPIO : 0x1000 (zbx_top_cpld.v)
|
||||
|
||||
//===============================================================================
|
||||
// RegTypes
|
||||
//===============================================================================
|
||||
|
||||
//===============================================================================
|
||||
// Register Group GPIO_REGMAP_WINDOWS
|
||||
//===============================================================================
|
||||
|
||||
// BASE_WINDOW_GPIO Window (from zbx_top_cpld.v)
|
||||
localparam BASE_WINDOW_GPIO = 'h0; // Window Offset
|
||||
localparam BASE_WINDOW_GPIO_SIZE = 'h20; // size in bytes
|
||||
|
||||
// DB_CONTROL_WINDOW_GPIO Window (from zbx_top_cpld.v)
|
||||
localparam DB_CONTROL_WINDOW_GPIO = 'h1000; // Window Offset
|
||||
localparam DB_CONTROL_WINDOW_GPIO_SIZE = 'h5000; // size in bytes
|
||||
@@ -0,0 +1,46 @@
|
||||
//
|
||||
// Copyright 2021 Ettus Research, A National Instruments Company
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
// Module: led_setup_regmap_utils.vh
|
||||
// Description:
|
||||
// The constants in this file are autogenerated by XmlParse.
|
||||
|
||||
//===============================================================================
|
||||
// A numerically ordered list of registers and their HDL source files
|
||||
//===============================================================================
|
||||
|
||||
// LED_CONTROL : 0x0 (led_control.v)
|
||||
|
||||
//===============================================================================
|
||||
// RegTypes
|
||||
//===============================================================================
|
||||
|
||||
// LED_CONTROL_TYPE Type (from led_control.v)
|
||||
localparam LED_CONTROL_TYPE_SIZE = 32;
|
||||
localparam LED_CONTROL_TYPE_MASK = 32'h70007;
|
||||
localparam CH0_RX2_LED_EN_SIZE = 1; //LED_CONTROL_TYPE:CH0_RX2_LED_EN
|
||||
localparam CH0_RX2_LED_EN_MSB = 0; //LED_CONTROL_TYPE:CH0_RX2_LED_EN
|
||||
localparam CH0_RX2_LED_EN = 0; //LED_CONTROL_TYPE:CH0_RX2_LED_EN
|
||||
localparam CH0_TRX1_LED_EN_SIZE = 2; //LED_CONTROL_TYPE:CH0_TRX1_LED_EN
|
||||
localparam CH0_TRX1_LED_EN_MSB = 2; //LED_CONTROL_TYPE:CH0_TRX1_LED_EN
|
||||
localparam CH0_TRX1_LED_EN = 1; //LED_CONTROL_TYPE:CH0_TRX1_LED_EN
|
||||
localparam CH1_RX2_LED_EN_SIZE = 1; //LED_CONTROL_TYPE:CH1_RX2_LED_EN
|
||||
localparam CH1_RX2_LED_EN_MSB = 16; //LED_CONTROL_TYPE:CH1_RX2_LED_EN
|
||||
localparam CH1_RX2_LED_EN = 16; //LED_CONTROL_TYPE:CH1_RX2_LED_EN
|
||||
localparam CH1_TRX1_LED_EN_SIZE = 2; //LED_CONTROL_TYPE:CH1_TRX1_LED_EN
|
||||
localparam CH1_TRX1_LED_EN_MSB = 18; //LED_CONTROL_TYPE:CH1_TRX1_LED_EN
|
||||
localparam CH1_TRX1_LED_EN = 17; //LED_CONTROL_TYPE:CH1_TRX1_LED_EN
|
||||
|
||||
//===============================================================================
|
||||
// Register Group LED_SETUP_REGISTERS
|
||||
//===============================================================================
|
||||
|
||||
// LED_CONTROL Register (from led_control.v)
|
||||
localparam LED_CONTROL_COUNT = 256; // Number of elements in array
|
||||
|
||||
// Return the offset of an element of register array LED_CONTROL
|
||||
function integer LED_CONTROL (input integer i);
|
||||
LED_CONTROL = (i * 'h4) + 'h0;
|
||||
endfunction
|
||||
@@ -0,0 +1,110 @@
|
||||
//
|
||||
// Copyright 2021 Ettus Research, A National Instruments Company
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
// Module: lo_control_regmap_utils.vh
|
||||
// Description:
|
||||
// The constants in this file are autogenerated by XmlParse.
|
||||
|
||||
//===============================================================================
|
||||
// A numerically ordered list of registers and their HDL source files
|
||||
//===============================================================================
|
||||
|
||||
// LO_SPI_SETUP/LO_SPI_STATUS : 0x0 (lo_control.v, lo_control.v)
|
||||
// LO_PULSE_SYNC : 0x4 (lo_control.v)
|
||||
|
||||
//===============================================================================
|
||||
// RegTypes
|
||||
//===============================================================================
|
||||
|
||||
//===============================================================================
|
||||
// Register Group LO_SPI_REGISTERS
|
||||
//===============================================================================
|
||||
|
||||
// Enumerated type LO_CHIP_SELECT
|
||||
localparam LO_CHIP_SELECT_SIZE = 8;
|
||||
localparam TX0_LO1 = 'h0; // LO_CHIP_SELECT:TX0_LO1
|
||||
localparam TX0_LO2 = 'h1; // LO_CHIP_SELECT:TX0_LO2
|
||||
localparam TX1_LO1 = 'h2; // LO_CHIP_SELECT:TX1_LO1
|
||||
localparam TX1_LO2 = 'h3; // LO_CHIP_SELECT:TX1_LO2
|
||||
localparam RX0_LO1 = 'h4; // LO_CHIP_SELECT:RX0_LO1
|
||||
localparam RX0_LO2 = 'h5; // LO_CHIP_SELECT:RX0_LO2
|
||||
localparam RX1_LO1 = 'h6; // LO_CHIP_SELECT:RX1_LO1
|
||||
localparam RX1_LO2 = 'h7; // LO_CHIP_SELECT:RX1_LO2
|
||||
|
||||
// LO_SPI_SETUP Register (from lo_control.v)
|
||||
localparam LO_SPI_SETUP = 'h0; // Register Offset
|
||||
localparam LO_SPI_SETUP_SIZE = 32; // register width in bits
|
||||
localparam LO_SPI_SETUP_MASK = 32'h17FFFFFF;
|
||||
localparam LO_SPI_WT_DATA_SIZE = 16; //LO_SPI_SETUP:LO_SPI_WT_DATA
|
||||
localparam LO_SPI_WT_DATA_MSB = 15; //LO_SPI_SETUP:LO_SPI_WT_DATA
|
||||
localparam LO_SPI_WT_DATA = 0; //LO_SPI_SETUP:LO_SPI_WT_DATA
|
||||
localparam LO_SPI_WT_ADDR_SIZE = 7; //LO_SPI_SETUP:LO_SPI_WT_ADDR
|
||||
localparam LO_SPI_WT_ADDR_MSB = 22; //LO_SPI_SETUP:LO_SPI_WT_ADDR
|
||||
localparam LO_SPI_WT_ADDR = 16; //LO_SPI_SETUP:LO_SPI_WT_ADDR
|
||||
localparam LO_SPI_RD_SIZE = 1; //LO_SPI_SETUP:LO_SPI_RD
|
||||
localparam LO_SPI_RD_MSB = 23; //LO_SPI_SETUP:LO_SPI_RD
|
||||
localparam LO_SPI_RD = 23; //LO_SPI_SETUP:LO_SPI_RD
|
||||
localparam LO_SELECT_SIZE = 3; //LO_SPI_SETUP:LO_SELECT
|
||||
localparam LO_SELECT_MSB = 26; //LO_SPI_SETUP:LO_SELECT
|
||||
localparam LO_SELECT = 24; //LO_SPI_SETUP:LO_SELECT
|
||||
localparam LO_SPI_START_TRANSACTION_SIZE = 1; //LO_SPI_SETUP:LO_SPI_START_TRANSACTION
|
||||
localparam LO_SPI_START_TRANSACTION_MSB = 28; //LO_SPI_SETUP:LO_SPI_START_TRANSACTION
|
||||
localparam LO_SPI_START_TRANSACTION = 28; //LO_SPI_SETUP:LO_SPI_START_TRANSACTION
|
||||
|
||||
// LO_SPI_STATUS Register (from lo_control.v)
|
||||
localparam LO_SPI_STATUS = 'h0; // Register Offset
|
||||
localparam LO_SPI_STATUS_SIZE = 32; // register width in bits
|
||||
localparam LO_SPI_STATUS_MASK = 32'hC77FFFFF;
|
||||
localparam LO_SPI_RD_DATA_SIZE = 16; //LO_SPI_STATUS:LO_SPI_RD_DATA
|
||||
localparam LO_SPI_RD_DATA_MSB = 15; //LO_SPI_STATUS:LO_SPI_RD_DATA
|
||||
localparam LO_SPI_RD_DATA = 0; //LO_SPI_STATUS:LO_SPI_RD_DATA
|
||||
localparam LO_SPI_RD_ADDR_SIZE = 7; //LO_SPI_STATUS:LO_SPI_RD_ADDR
|
||||
localparam LO_SPI_RD_ADDR_MSB = 22; //LO_SPI_STATUS:LO_SPI_RD_ADDR
|
||||
localparam LO_SPI_RD_ADDR = 16; //LO_SPI_STATUS:LO_SPI_RD_ADDR
|
||||
localparam LO_SELECT_STATUS_SIZE = 3; //LO_SPI_STATUS:LO_SELECT_STATUS
|
||||
localparam LO_SELECT_STATUS_MSB = 26; //LO_SPI_STATUS:LO_SELECT_STATUS
|
||||
localparam LO_SELECT_STATUS = 24; //LO_SPI_STATUS:LO_SELECT_STATUS
|
||||
localparam LO_SPI_READY_SIZE = 1; //LO_SPI_STATUS:LO_SPI_READY
|
||||
localparam LO_SPI_READY_MSB = 30; //LO_SPI_STATUS:LO_SPI_READY
|
||||
localparam LO_SPI_READY = 30; //LO_SPI_STATUS:LO_SPI_READY
|
||||
localparam LO_SPI_DATA_VALID_SIZE = 1; //LO_SPI_STATUS:LO_SPI_DATA_VALID
|
||||
localparam LO_SPI_DATA_VALID_MSB = 31; //LO_SPI_STATUS:LO_SPI_DATA_VALID
|
||||
localparam LO_SPI_DATA_VALID = 31; //LO_SPI_STATUS:LO_SPI_DATA_VALID
|
||||
|
||||
//===============================================================================
|
||||
// Register Group LO_SYNC_REGS
|
||||
//===============================================================================
|
||||
|
||||
// LO_PULSE_SYNC Register (from lo_control.v)
|
||||
localparam LO_PULSE_SYNC = 'h4; // Register Offset
|
||||
localparam LO_PULSE_SYNC_SIZE = 32; // register width in bits
|
||||
localparam LO_PULSE_SYNC_MASK = 32'h1FF;
|
||||
localparam PULSE_TX0_LO1_SYNC_SIZE = 1; //LO_PULSE_SYNC:PULSE_TX0_LO1_SYNC
|
||||
localparam PULSE_TX0_LO1_SYNC_MSB = 0; //LO_PULSE_SYNC:PULSE_TX0_LO1_SYNC
|
||||
localparam PULSE_TX0_LO1_SYNC = 0; //LO_PULSE_SYNC:PULSE_TX0_LO1_SYNC
|
||||
localparam PULSE_TX0_LO2_SYNC_SIZE = 1; //LO_PULSE_SYNC:PULSE_TX0_LO2_SYNC
|
||||
localparam PULSE_TX0_LO2_SYNC_MSB = 1; //LO_PULSE_SYNC:PULSE_TX0_LO2_SYNC
|
||||
localparam PULSE_TX0_LO2_SYNC = 1; //LO_PULSE_SYNC:PULSE_TX0_LO2_SYNC
|
||||
localparam PULSE_TX1_LO1_SYNC_SIZE = 1; //LO_PULSE_SYNC:PULSE_TX1_LO1_SYNC
|
||||
localparam PULSE_TX1_LO1_SYNC_MSB = 2; //LO_PULSE_SYNC:PULSE_TX1_LO1_SYNC
|
||||
localparam PULSE_TX1_LO1_SYNC = 2; //LO_PULSE_SYNC:PULSE_TX1_LO1_SYNC
|
||||
localparam PULSE_TX1_LO2_SYNC_SIZE = 1; //LO_PULSE_SYNC:PULSE_TX1_LO2_SYNC
|
||||
localparam PULSE_TX1_LO2_SYNC_MSB = 3; //LO_PULSE_SYNC:PULSE_TX1_LO2_SYNC
|
||||
localparam PULSE_TX1_LO2_SYNC = 3; //LO_PULSE_SYNC:PULSE_TX1_LO2_SYNC
|
||||
localparam PULSE_RX0_LO1_SYNC_SIZE = 1; //LO_PULSE_SYNC:PULSE_RX0_LO1_SYNC
|
||||
localparam PULSE_RX0_LO1_SYNC_MSB = 4; //LO_PULSE_SYNC:PULSE_RX0_LO1_SYNC
|
||||
localparam PULSE_RX0_LO1_SYNC = 4; //LO_PULSE_SYNC:PULSE_RX0_LO1_SYNC
|
||||
localparam PULSE_RX0_LO2_SYNC_SIZE = 1; //LO_PULSE_SYNC:PULSE_RX0_LO2_SYNC
|
||||
localparam PULSE_RX0_LO2_SYNC_MSB = 5; //LO_PULSE_SYNC:PULSE_RX0_LO2_SYNC
|
||||
localparam PULSE_RX0_LO2_SYNC = 5; //LO_PULSE_SYNC:PULSE_RX0_LO2_SYNC
|
||||
localparam PULSE_RX1_LO1_SYNC_SIZE = 1; //LO_PULSE_SYNC:PULSE_RX1_LO1_SYNC
|
||||
localparam PULSE_RX1_LO1_SYNC_MSB = 6; //LO_PULSE_SYNC:PULSE_RX1_LO1_SYNC
|
||||
localparam PULSE_RX1_LO1_SYNC = 6; //LO_PULSE_SYNC:PULSE_RX1_LO1_SYNC
|
||||
localparam PULSE_RX1_LO2_SYNC_SIZE = 1; //LO_PULSE_SYNC:PULSE_RX1_LO2_SYNC
|
||||
localparam PULSE_RX1_LO2_SYNC_MSB = 7; //LO_PULSE_SYNC:PULSE_RX1_LO2_SYNC
|
||||
localparam PULSE_RX1_LO2_SYNC = 7; //LO_PULSE_SYNC:PULSE_RX1_LO2_SYNC
|
||||
localparam BYPASS_SYNC_REGISTER_SIZE = 1; //LO_PULSE_SYNC:BYPASS_SYNC_REGISTER
|
||||
localparam BYPASS_SYNC_REGISTER_MSB = 8; //LO_PULSE_SYNC:BYPASS_SYNC_REGISTER
|
||||
localparam BYPASS_SYNC_REGISTER = 8; //LO_PULSE_SYNC:BYPASS_SYNC_REGISTER
|
||||
@@ -0,0 +1,57 @@
|
||||
//
|
||||
// Copyright 2021 Ettus Research, A National Instruments Company
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
// Module: power_regs_regmap_utils.vh
|
||||
// Description:
|
||||
// The constants in this file are autogenerated by XmlParse.
|
||||
|
||||
//===============================================================================
|
||||
// A numerically ordered list of registers and their HDL source files
|
||||
//===============================================================================
|
||||
|
||||
// RF_POWER_CONTROL : 0x0 (power_regs.v)
|
||||
// RF_POWER_STATUS : 0x4 (power_regs.v)
|
||||
// PRC_CONTROL : 0x8 (power_regs.v)
|
||||
|
||||
//===============================================================================
|
||||
// RegTypes
|
||||
//===============================================================================
|
||||
|
||||
//===============================================================================
|
||||
// Register Group POWER_REGS_REGISTERS
|
||||
//===============================================================================
|
||||
|
||||
// RF_POWER_CONTROL Register (from power_regs.v)
|
||||
localparam RF_POWER_CONTROL = 'h0; // Register Offset
|
||||
localparam RF_POWER_CONTROL_SIZE = 32; // register width in bits
|
||||
localparam RF_POWER_CONTROL_MASK = 32'h7;
|
||||
localparam ENABLE_TX_7V0_SIZE = 1; //RF_POWER_CONTROL:ENABLE_TX_7V0
|
||||
localparam ENABLE_TX_7V0_MSB = 0; //RF_POWER_CONTROL:ENABLE_TX_7V0
|
||||
localparam ENABLE_TX_7V0 = 0; //RF_POWER_CONTROL:ENABLE_TX_7V0
|
||||
localparam ENABLE_RX_7V0_SIZE = 1; //RF_POWER_CONTROL:ENABLE_RX_7V0
|
||||
localparam ENABLE_RX_7V0_MSB = 1; //RF_POWER_CONTROL:ENABLE_RX_7V0
|
||||
localparam ENABLE_RX_7V0 = 1; //RF_POWER_CONTROL:ENABLE_RX_7V0
|
||||
localparam ENABLE_3V3_SIZE = 1; //RF_POWER_CONTROL:ENABLE_3v3
|
||||
localparam ENABLE_3V3_MSB = 2; //RF_POWER_CONTROL:ENABLE_3v3
|
||||
localparam ENABLE_3V3 = 2; //RF_POWER_CONTROL:ENABLE_3v3
|
||||
|
||||
// RF_POWER_STATUS Register (from power_regs.v)
|
||||
localparam RF_POWER_STATUS = 'h4; // Register Offset
|
||||
localparam RF_POWER_STATUS_SIZE = 32; // register width in bits
|
||||
localparam RF_POWER_STATUS_MASK = 32'h3;
|
||||
localparam P7V_A_STATUS_SIZE = 1; //RF_POWER_STATUS:P7V_A_STATUS
|
||||
localparam P7V_A_STATUS_MSB = 0; //RF_POWER_STATUS:P7V_A_STATUS
|
||||
localparam P7V_A_STATUS = 0; //RF_POWER_STATUS:P7V_A_STATUS
|
||||
localparam P7V_B_STATUS_SIZE = 1; //RF_POWER_STATUS:P7V_B_STATUS
|
||||
localparam P7V_B_STATUS_MSB = 1; //RF_POWER_STATUS:P7V_B_STATUS
|
||||
localparam P7V_B_STATUS = 1; //RF_POWER_STATUS:P7V_B_STATUS
|
||||
|
||||
// PRC_CONTROL Register (from power_regs.v)
|
||||
localparam PRC_CONTROL = 'h8; // Register Offset
|
||||
localparam PRC_CONTROL_SIZE = 32; // register width in bits
|
||||
localparam PRC_CONTROL_MASK = 32'h1;
|
||||
localparam PLL_REF_CLOCK_ENABLE_SIZE = 1; //PRC_CONTROL:PLL_REF_CLOCK_ENABLE
|
||||
localparam PLL_REF_CLOCK_ENABLE_MSB = 0; //PRC_CONTROL:PLL_REF_CLOCK_ENABLE
|
||||
localparam PLL_REF_CLOCK_ENABLE = 0; //PRC_CONTROL:PLL_REF_CLOCK_ENABLE
|
||||
@@ -0,0 +1,41 @@
|
||||
//
|
||||
// Copyright 2021 Ettus Research, A National Instruments Company
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
// Module: spi_regmap_utils.vh
|
||||
// Description:
|
||||
// The constants in this file are autogenerated by XmlParse.
|
||||
|
||||
//===============================================================================
|
||||
// A numerically ordered list of registers and their HDL source files
|
||||
//===============================================================================
|
||||
|
||||
// BASE_WINDOW_SPI : 0x0 (zbx_top_cpld.v)
|
||||
// RECONFIG : 0x20 (zbx_top_cpld.v)
|
||||
// POWER_REGS : 0x40 (zbx_top_cpld.v)
|
||||
// DB_CONTROL_WINDOW_SPI : 0x1000 (zbx_top_cpld.v)
|
||||
|
||||
//===============================================================================
|
||||
// RegTypes
|
||||
//===============================================================================
|
||||
|
||||
//===============================================================================
|
||||
// Register Group SPI_REGMAP_WINDOWS
|
||||
//===============================================================================
|
||||
|
||||
// BASE_WINDOW_SPI Window (from zbx_top_cpld.v)
|
||||
localparam BASE_WINDOW_SPI = 'h0; // Window Offset
|
||||
localparam BASE_WINDOW_SPI_SIZE = 'h20; // size in bytes
|
||||
|
||||
// RECONFIG Window (from zbx_top_cpld.v)
|
||||
localparam RECONFIG = 'h20; // Window Offset
|
||||
localparam RECONFIG_SIZE = 'h20; // size in bytes
|
||||
|
||||
// POWER_REGS Window (from zbx_top_cpld.v)
|
||||
localparam POWER_REGS = 'h40; // Window Offset
|
||||
localparam POWER_REGS_SIZE = 'h20; // size in bytes
|
||||
|
||||
// DB_CONTROL_WINDOW_SPI Window (from zbx_top_cpld.v)
|
||||
localparam DB_CONTROL_WINDOW_SPI = 'h1000; // Window Offset
|
||||
localparam DB_CONTROL_WINDOW_SPI_SIZE = 'h5000; // size in bytes
|
||||
@@ -0,0 +1,131 @@
|
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//
|
||||
// Copyright 2021 Ettus Research, A National Instruments Company
|
||||
//
|
||||
// SPDX-License-Identifier: LGPL-3.0-or-later
|
||||
//
|
||||
// Module: switch_setup_regmap_utils.vh
|
||||
// Description:
|
||||
// The constants in this file are autogenerated by XmlParse.
|
||||
|
||||
//===============================================================================
|
||||
// A numerically ordered list of registers and their HDL source files
|
||||
//===============================================================================
|
||||
|
||||
// TX0_PATH_CONTROL : 0x0 (switch_control.v)
|
||||
// TX1_PATH_CONTROL : 0x400 (switch_control.v)
|
||||
// RX0_PATH_CONTROL : 0x800 (switch_control.v)
|
||||
// RX1_PATH_CONTROL : 0xC00 (switch_control.v)
|
||||
|
||||
//===============================================================================
|
||||
// RegTypes
|
||||
//===============================================================================
|
||||
|
||||
// RX_PATH_CONTROL Type (from switch_control.v)
|
||||
localparam RX_PATH_CONTROL_SIZE = 32;
|
||||
localparam RX_PATH_CONTROL_MASK = 32'h757D77;
|
||||
localparam RX_SWITCH_1_SIZE = 2; //RX_PATH_CONTROL:RX_SWITCH_1
|
||||
localparam RX_SWITCH_1_MSB = 1; //RX_PATH_CONTROL:RX_SWITCH_1
|
||||
localparam RX_SWITCH_1 = 0; //RX_PATH_CONTROL:RX_SWITCH_1
|
||||
localparam RX_SWITCH_2_SIZE = 1; //RX_PATH_CONTROL:RX_SWITCH_2
|
||||
localparam RX_SWITCH_2_MSB = 2; //RX_PATH_CONTROL:RX_SWITCH_2
|
||||
localparam RX_SWITCH_2 = 2; //RX_PATH_CONTROL:RX_SWITCH_2
|
||||
localparam RX_SWITCH_3_SIZE = 3; //RX_PATH_CONTROL:RX_SWITCH_3
|
||||
localparam RX_SWITCH_3_MSB = 6; //RX_PATH_CONTROL:RX_SWITCH_3
|
||||
localparam RX_SWITCH_3 = 4; //RX_PATH_CONTROL:RX_SWITCH_3
|
||||
localparam RX_SWITCH_4_SIZE = 1; //RX_PATH_CONTROL:RX_SWITCH_4
|
||||
localparam RX_SWITCH_4_MSB = 8; //RX_PATH_CONTROL:RX_SWITCH_4
|
||||
localparam RX_SWITCH_4 = 8; //RX_PATH_CONTROL:RX_SWITCH_4
|
||||
localparam RX_SWITCH_5_SIZE = 2; //RX_PATH_CONTROL:RX_SWITCH_5
|
||||
localparam RX_SWITCH_5_MSB = 11; //RX_PATH_CONTROL:RX_SWITCH_5
|
||||
localparam RX_SWITCH_5 = 10; //RX_PATH_CONTROL:RX_SWITCH_5
|
||||
localparam RX_SWITCH_6_SIZE = 2; //RX_PATH_CONTROL:RX_SWITCH_6
|
||||
localparam RX_SWITCH_6_MSB = 13; //RX_PATH_CONTROL:RX_SWITCH_6
|
||||
localparam RX_SWITCH_6 = 12; //RX_PATH_CONTROL:RX_SWITCH_6
|
||||
localparam RX_SWITCH_7_8_SIZE = 1; //RX_PATH_CONTROL:RX_SWITCH_7_8
|
||||
localparam RX_SWITCH_7_8_MSB = 14; //RX_PATH_CONTROL:RX_SWITCH_7_8
|
||||
localparam RX_SWITCH_7_8 = 14; //RX_PATH_CONTROL:RX_SWITCH_7_8
|
||||
localparam RX_SWITCH_9_SIZE = 1; //RX_PATH_CONTROL:RX_SWITCH_9
|
||||
localparam RX_SWITCH_9_MSB = 16; //RX_PATH_CONTROL:RX_SWITCH_9
|
||||
localparam RX_SWITCH_9 = 16; //RX_PATH_CONTROL:RX_SWITCH_9
|
||||
localparam RX_SWITCH_10_SIZE = 1; //RX_PATH_CONTROL:RX_SWITCH_10
|
||||
localparam RX_SWITCH_10_MSB = 18; //RX_PATH_CONTROL:RX_SWITCH_10
|
||||
localparam RX_SWITCH_10 = 18; //RX_PATH_CONTROL:RX_SWITCH_10
|
||||
localparam RX_SWITCH_11_SIZE = 3; //RX_PATH_CONTROL:RX_SWITCH_11
|
||||
localparam RX_SWITCH_11_MSB = 22; //RX_PATH_CONTROL:RX_SWITCH_11
|
||||
localparam RX_SWITCH_11 = 20; //RX_PATH_CONTROL:RX_SWITCH_11
|
||||
|
||||
// TX_PATH_CONTROL Type (from switch_control.v)
|
||||
localparam TX_PATH_CONTROL_SIZE = 32;
|
||||
localparam TX_PATH_CONTROL_MASK = 32'h53F7FFD;
|
||||
localparam TX_SWITCH_1_2_SIZE = 1; //TX_PATH_CONTROL:TX_SWITCH_1_2
|
||||
localparam TX_SWITCH_1_2_MSB = 0; //TX_PATH_CONTROL:TX_SWITCH_1_2
|
||||
localparam TX_SWITCH_1_2 = 0; //TX_PATH_CONTROL:TX_SWITCH_1_2
|
||||
localparam TX_SWITCH_3_SIZE = 2; //TX_PATH_CONTROL:TX_SWITCH_3
|
||||
localparam TX_SWITCH_3_MSB = 3; //TX_PATH_CONTROL:TX_SWITCH_3
|
||||
localparam TX_SWITCH_3 = 2; //TX_PATH_CONTROL:TX_SWITCH_3
|
||||
localparam TX_SWITCH_4_SIZE = 2; //TX_PATH_CONTROL:TX_SWITCH_4
|
||||
localparam TX_SWITCH_4_MSB = 5; //TX_PATH_CONTROL:TX_SWITCH_4
|
||||
localparam TX_SWITCH_4 = 4; //TX_PATH_CONTROL:TX_SWITCH_4
|
||||
localparam TX_SWITCH_5_SIZE = 2; //TX_PATH_CONTROL:TX_SWITCH_5
|
||||
localparam TX_SWITCH_5_MSB = 7; //TX_PATH_CONTROL:TX_SWITCH_5
|
||||
localparam TX_SWITCH_5 = 6; //TX_PATH_CONTROL:TX_SWITCH_5
|
||||
localparam TX_SWITCH_6_SIZE = 2; //TX_PATH_CONTROL:TX_SWITCH_6
|
||||
localparam TX_SWITCH_6_MSB = 9; //TX_PATH_CONTROL:TX_SWITCH_6
|
||||
localparam TX_SWITCH_6 = 8; //TX_PATH_CONTROL:TX_SWITCH_6
|
||||
localparam TX_SWITCH_7_SIZE = 2; //TX_PATH_CONTROL:TX_SWITCH_7
|
||||
localparam TX_SWITCH_7_MSB = 11; //TX_PATH_CONTROL:TX_SWITCH_7
|
||||
localparam TX_SWITCH_7 = 10; //TX_PATH_CONTROL:TX_SWITCH_7
|
||||
localparam TX_SWITCH_8_SIZE = 3; //TX_PATH_CONTROL:TX_SWITCH_8
|
||||
localparam TX_SWITCH_8_MSB = 14; //TX_PATH_CONTROL:TX_SWITCH_8
|
||||
localparam TX_SWITCH_8 = 12; //TX_PATH_CONTROL:TX_SWITCH_8
|
||||
localparam TX_SWITCH_9_SIZE = 2; //TX_PATH_CONTROL:TX_SWITCH_9
|
||||
localparam TX_SWITCH_9_MSB = 17; //TX_PATH_CONTROL:TX_SWITCH_9
|
||||
localparam TX_SWITCH_9 = 16; //TX_PATH_CONTROL:TX_SWITCH_9
|
||||
localparam TX_SWITCH_10_SIZE = 2; //TX_PATH_CONTROL:TX_SWITCH_10
|
||||
localparam TX_SWITCH_10_MSB = 19; //TX_PATH_CONTROL:TX_SWITCH_10
|
||||
localparam TX_SWITCH_10 = 18; //TX_PATH_CONTROL:TX_SWITCH_10
|
||||
localparam TX_SWITCH_11_SIZE = 2; //TX_PATH_CONTROL:TX_SWITCH_11
|
||||
localparam TX_SWITCH_11_MSB = 21; //TX_PATH_CONTROL:TX_SWITCH_11
|
||||
localparam TX_SWITCH_11 = 20; //TX_PATH_CONTROL:TX_SWITCH_11
|
||||
localparam TX_SWITCH_13_SIZE = 1; //TX_PATH_CONTROL:TX_SWITCH_13
|
||||
localparam TX_SWITCH_13_MSB = 24; //TX_PATH_CONTROL:TX_SWITCH_13
|
||||
localparam TX_SWITCH_13 = 24; //TX_PATH_CONTROL:TX_SWITCH_13
|
||||
localparam TX_SWITCH_14_SIZE = 1; //TX_PATH_CONTROL:TX_SWITCH_14
|
||||
localparam TX_SWITCH_14_MSB = 26; //TX_PATH_CONTROL:TX_SWITCH_14
|
||||
localparam TX_SWITCH_14 = 26; //TX_PATH_CONTROL:TX_SWITCH_14
|
||||
|
||||
//===============================================================================
|
||||
// Register Group SWITCH_SETUP_REGISTERS
|
||||
//===============================================================================
|
||||
|
||||
// TX0_PATH_CONTROL Register (from switch_control.v)
|
||||
localparam TX0_PATH_CONTROL_COUNT = 256; // Number of elements in array
|
||||
|
||||
// TX1_PATH_CONTROL Register (from switch_control.v)
|
||||
localparam TX1_PATH_CONTROL_COUNT = 256; // Number of elements in array
|
||||
|
||||
// RX0_PATH_CONTROL Register (from switch_control.v)
|
||||
localparam RX0_PATH_CONTROL_COUNT = 256; // Number of elements in array
|
||||
|
||||
// RX1_PATH_CONTROL Register (from switch_control.v)
|
||||
localparam RX1_PATH_CONTROL_COUNT = 256; // Number of elements in array
|
||||
|
||||
// Return the offset of an element of register array TX0_PATH_CONTROL
|
||||
function integer TX0_PATH_CONTROL (input integer i);
|
||||
TX0_PATH_CONTROL = (i * 'h4) + 'h0;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array TX1_PATH_CONTROL
|
||||
function integer TX1_PATH_CONTROL (input integer i);
|
||||
TX1_PATH_CONTROL = (i * 'h4) + 'h400;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array RX0_PATH_CONTROL
|
||||
function integer RX0_PATH_CONTROL (input integer i);
|
||||
RX0_PATH_CONTROL = (i * 'h4) + 'h800;
|
||||
endfunction
|
||||
|
||||
// Return the offset of an element of register array RX1_PATH_CONTROL
|
||||
function integer RX1_PATH_CONTROL (input integer i);
|
||||
RX1_PATH_CONTROL = (i * 'h4) + 'hC00;
|
||||
endfunction
|
||||
Reference in New Issue
Block a user