fpga: lib: Fix Vivado warnings

Original-commit: ad3d614426e068a067692df411412ce3ed936c39
2023-06-09 09:01:04 -05:00
parent 0817f084a3
commit 9ed8bb22d6
9 changed files with 19 additions and 14 deletions
@@ -125,7 +125,7 @@ module dds_freq_tune_duc #(

  // Width of each component of the DDS output. This width is fixed by the IP
  // configuration.
-  parameter DDS_W = 16;
+  localparam DDS_W = 16;

  wire               m_axis_dds_tlast;
  wire               m_axis_dds_tvalid;