fpga: lib: Fix Vivado warnings

Original-commit: ad3d614426e068a067692df411412ce3ed936c39

lib/axi4s_sv/axi4s_packet_gate.sv

@@ -26,8 +26,8 @@ module axi4s_packet_gate #(
 ) (
   input logic clear=1'b0,
   input logic error=1'b0,
-  interface   i,  // AxiStreamIf or AxiStreamPacketIf
-  interface   o   // AxiStreamIf or AxiStreamPacketIf
+  interface.slave  i,  // AxiStreamIf or AxiStreamPacketIf
+  interface.master o   // AxiStreamIf or AxiStreamPacketIf
 );
 
   `include "axi4s.vh"