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fpga: x400: cpld: Add support for X410 motherboard CPLD

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Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>


Original-commit: 7015f5ed2d495f3908773b7c7d74864d0cc3871a
This commit is contained in:
Max Köhler
2021-06-10 11:56:58 -05:00
committed by Aaron Rossetto
co-authored by Humberto Jimenez Javier Valenzuela
parent 61782b02d7
commit 7e59e9516d
42 changed files with 8377 additions and 0 deletions
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top/x400/cpld/regmap/ps_power_regmap_utils.vh
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//
// Copyright 2021 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: ps_power_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// IPASS_POWER_REG : 0x0 (ps_power_regs.v)
// OSC_POWER_REG : 0x4 (ps_power_regs.v)
//===============================================================================
// RegTypes
//===============================================================================
//===============================================================================
// Register Group PS_POWER_REGS
//===============================================================================
// IPASS_POWER_REG Register (from ps_power_regs.v)
localparam IPASS_POWER_REG = 'h0; // Register Offset
localparam IPASS_POWER_REG_SIZE = 32; // register width in bits
localparam IPASS_POWER_REG_MASK = 32'hC0000001;
localparam IPASS_DISABLE_POWER_BIT_SIZE = 1; //IPASS_POWER_REG:IPASS_DISABLE_POWER_BIT
localparam IPASS_DISABLE_POWER_BIT_MSB = 0; //IPASS_POWER_REG:IPASS_DISABLE_POWER_BIT
localparam IPASS_DISABLE_POWER_BIT = 0; //IPASS_POWER_REG:IPASS_DISABLE_POWER_BIT
localparam IPASS_CLEAR_POWER_FAULT0_SIZE = 1; //IPASS_POWER_REG:IPASS_CLEAR_POWER_FAULT0
localparam IPASS_CLEAR_POWER_FAULT0_MSB = 30; //IPASS_POWER_REG:IPASS_CLEAR_POWER_FAULT0
localparam IPASS_CLEAR_POWER_FAULT0 = 30; //IPASS_POWER_REG:IPASS_CLEAR_POWER_FAULT0
localparam IPASS_POWER_FAULT0_SIZE = 1; //IPASS_POWER_REG:IPASS_POWER_FAULT0
localparam IPASS_POWER_FAULT0_MSB = 30; //IPASS_POWER_REG:IPASS_POWER_FAULT0
localparam IPASS_POWER_FAULT0 = 30; //IPASS_POWER_REG:IPASS_POWER_FAULT0
localparam IPASS_CLEAR_POWER_FAULT1_SIZE = 1; //IPASS_POWER_REG:IPASS_CLEAR_POWER_FAULT1
localparam IPASS_CLEAR_POWER_FAULT1_MSB = 31; //IPASS_POWER_REG:IPASS_CLEAR_POWER_FAULT1
localparam IPASS_CLEAR_POWER_FAULT1 = 31; //IPASS_POWER_REG:IPASS_CLEAR_POWER_FAULT1
localparam IPASS_POWER_FAULT1_SIZE = 1; //IPASS_POWER_REG:IPASS_POWER_FAULT1
localparam IPASS_POWER_FAULT1_MSB = 31; //IPASS_POWER_REG:IPASS_POWER_FAULT1
localparam IPASS_POWER_FAULT1 = 31; //IPASS_POWER_REG:IPASS_POWER_FAULT1
// OSC_POWER_REG Register (from ps_power_regs.v)
localparam OSC_POWER_REG = 'h4; // Register Offset
localparam OSC_POWER_REG_SIZE = 32; // register width in bits
localparam OSC_POWER_REG_MASK = 32'h3;
localparam OSC_100_SIZE = 1; //OSC_POWER_REG:OSC_100
localparam OSC_100_MSB = 0; //OSC_POWER_REG:OSC_100
localparam OSC_100 = 0; //OSC_POWER_REG:OSC_100
localparam OSC_122_88_SIZE = 1; //OSC_POWER_REG:OSC_122_88
localparam OSC_122_88_MSB = 1; //OSC_POWER_REG:OSC_122_88
localparam OSC_122_88 = 1; //OSC_POWER_REG:OSC_122_88