fpga: x400: cpld: Add support for X410 motherboard CPLD

Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com> Original-commit: 7015f5ed2d495f3908773b7c7d74864d0cc3871a
2021-06-10 11:56:58 -05:00
parent 61782b02d7
commit 7e59e9516d
42 changed files with 8377 additions and 0 deletions
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+//
+// Copyright 2021 Ettus Research, A National Instruments Company
+//
+// SPDX-License-Identifier: LGPL-3.0-or-later
+//
+// Module: mb_cpld_pl_regmap_utils.vh
+// Description:
+// The constants in this file are autogenerated by XmlParse.
+
+//===============================================================================
+// A numerically ordered list of registers and their HDL source files
+//===============================================================================
+
+  // PL_REGISTERS : 0x0 (mb_cpld.v)
+  // JTAG_DB0     : 0x60 (mb_cpld.v)
+  // JTAG_DB1     : 0x80 (mb_cpld.v)
+
+//===============================================================================
+// RegTypes
+//===============================================================================
+
+//===============================================================================
+// Register Group MB_CPLD_PL_WINDOWS
+//===============================================================================
+
+  // PL_REGISTERS Window (from mb_cpld.v)
+  localparam PL_REGISTERS = 'h0; // Window Offset
+  localparam PL_REGISTERS_SIZE = 'h40;  // size in bytes
+
+  // JTAG_DB0 Window (from mb_cpld.v)
+  localparam JTAG_DB0 = 'h60; // Window Offset
+  localparam JTAG_DB0_SIZE = 'h20;  // size in bytes
+
+  // JTAG_DB1 Window (from mb_cpld.v)
+  localparam JTAG_DB1 = 'h80; // Window Offset
+  localparam JTAG_DB1_SIZE = 'h20;  // size in bytes