fpga: x440: cpld: led control cleanup

Original-commit: 1024b69d0c6b32176adf5f6f2269149ef0c34837

top/x400/cpld/x440/led_control.v

@@ -52,7 +52,7 @@ module led_control #(
   //---------------------------------------------------------------
   // ATR memory signals
   //---------------------------------------------------------------
-  reg  [31:0] led_ctrl_reg;
+  reg  [31:0] led_ctrl_reg = 32'h0;
 
   //---------------------------------------------------------------
   // Handling of CtrlPort

top/x400/cpld/x440/mb_cpld.v

@@ -94,13 +94,13 @@ module mb_cpld #(
   // 1 -> DB1 / 0 -> DB0
   output wire [1:0] CH0_RX2_LED,
   output wire [1:0] CH0_TX_LED,
-  output wire [1:0] CH0_RX_LED,   
+  output wire [1:0] CH0_RX_LED,
   output wire [1:0] CH1_RX2_LED,
-  output wire [1:0] CH1_TX_LED, 
+  output wire [1:0] CH1_TX_LED,
   output wire [1:0] CH1_RX_LED,
   output wire [1:0] CH2_RX2_LED,
   output wire [1:0] CH2_TX_LED,
-  output wire [1:0] CH2_RX_LED,   
+  output wire [1:0] CH2_RX_LED,
   output wire [1:0] CH3_RX2_LED,
   output wire [1:0] CH3_TX_LED,
   output wire [1:0] CH3_RX_LED,