fpga: removed superfluous B2x0 files
Original-commit: 09882ad86432db5087f85764c02989dbfc70fd3f
This commit is contained in:
Nicholas Corgan
File diff suppressed because it is too large
Load Diff
@@ -1,25 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<DARoots Version="1" Minor="26">
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<FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">
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<Filter Type="Constrs"/>
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<File Path="$PSRCDIR/constrs_1/imports/b200/b200.ucf">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../b200.ucf"/>
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<Attr Name="ImportTime" Val="1358988004"/>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/constrs_1/imports/b200/timing.ucf">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../timing.ucf"/>
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<Attr Name="ImportTime" Val="1359506480"/>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="ConstrsType" Val="UCF"/>
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</Config>
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</FileSet>
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</DARoots>
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@@ -1,20 +0,0 @@
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<?xml version="1.0"?>
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<Strategy Version="1" Minor="2">
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<StratHandle Name="ISE Defaults" Flow="ISE14">
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<Desc>ISE Defaults, including packing registers in IOs off</Desc>
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</StratHandle>
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<Step Id="ngdbuild">
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</Step>
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<Step Id="map">
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<Option Id="FFPackEnum">3</Option>
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</Step>
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<Step Id="par">
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</Step>
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<Step Id="trce">
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</Step>
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<Step Id="xdl">
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</Step>
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<Step Id="bitgen">
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</Step>
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</Strategy>
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@@ -1,25 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<DARoots Version="1" Minor="26">
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<FileSet Name="constrs_in" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1">
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<Filter Type="Constrs"/>
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<File Path="$PSRCDIR/constrs_1/imports/b200/b200.ucf">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../b200.ucf"/>
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<Attr Name="ImportTime" Val="1358988004"/>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/constrs_1/imports/b200/timing.ucf">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../timing.ucf"/>
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<Attr Name="ImportTime" Val="1359506480"/>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="ConstrsType" Val="UCF"/>
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</Config>
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</FileSet>
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</DARoots>
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@@ -1,20 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<DARoots Version="1" Minor="26">
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<FileSet Name="constrs_out" Type="Constrs" RelSrcDir="$PRUNDIR/impl_1/.constrs">
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<File Path="$PRUNDIR/impl_1/.constrs/b200.ucf">
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<FileInfo>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<File Path="$PRUNDIR/impl_1/.constrs/timing.ucf">
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<FileInfo>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="ConstrsType" Val="UCF"/>
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</Config>
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</FileSet>
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</DARoots>
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@@ -1,20 +0,0 @@
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<?xml version="1.0"?>
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<Strategy Version="1" Minor="2">
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<StratHandle Name="ISE Defaults" Flow="ISE14">
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<Desc>ISE Defaults, including packing registers in IOs off</Desc>
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</StratHandle>
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<Step Id="ngdbuild">
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</Step>
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<Step Id="map">
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<Option Id="FFPackEnum">3</Option>
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</Step>
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<Step Id="par">
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</Step>
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<Step Id="trce">
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</Step>
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<Step Id="xdl">
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</Step>
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<Step Id="bitgen">
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</Step>
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</Strategy>
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@@ -1,18 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<DARoots Version="1" Minor="26">
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<FileSet Name="sources" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
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<Filter Type="Srcs"/>
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<File Path="$PSRCDIR/sources_1/imports/build/b200.ngc">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../build/b200.ngc"/>
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<Attr Name="ImportTime" Val="1359508205"/>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="DesignMode" Val="RTL"/>
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<Option Name="TopModule" Val="b200"/>
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</Config>
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</FileSet>
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</DARoots>
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@@ -1,30 +0,0 @@
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<?xml version="1.0"?>
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<Runs Version="1" Minor="8">
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<Run Id="impl_1" Type="Ft2:EntireDesign" SrcSet="sources_1" Part="xc6slx75fgg484-3" LaunchPart="xc6slx75fgg484-3" ConstrsSet="constrs_1" Description="Imported on Tue Jan 29 17:25:57 2013" State="current" Dir="$PRUNDIR/impl_1" LaunchTime="1359509156" Reconstructed="TRUE">
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<File Type="MAP-PSR" Name="b200.psr"/>
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<File Type="PA-EDIF" Name="b200.edf"/>
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<File Type="PAR-NCD" Name="b200.ncd"/>
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<File Type="PA-UCF" Name="b200.ucf"/>
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<File Type="PAR-PAD" Name="b200_routed_pad.txt"/>
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<File Type="PAR-PAR" Name="b200_routed.par"/>
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<File Type="PAR-UNR" Name="b200_routed.unroutes"/>
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<File Type="BG-BIT" Name="b200.bit"/>
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<File Type="BG-DRC" Name="b200.drc"/>
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<File Type="PA-CONSTRSDIR" Name=".constrs"/>
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<File Type="BG-BGN" Name="b200.bgn"/>
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<File Type="TRCE-TWR" Name="b200.twr"/>
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<File Type="TRCE-TWX" Name="b200.twx"/>
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<File Type="XDL-XDL" Name="b200.xdl"/>
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<File Type="WBT-USG" Name="usage_statistics_webtalk.html"/>
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<File Type="WBT-LOG" Name="webtalk.log"/>
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<File Type="RUN-SRCS" Name="$PDATADIR/runs/impl_1/sources.xml"/>
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<File Type="RUN-CONSTRS" Name="$PDATADIR/runs/impl_1/constrs_in.xml"/>
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<File Type="RUN-STRAT" Name="$PDATADIR/runs/impl_1/impl_1.psg"/>
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<File Type="NGDB-NGD" Name="b200.ngd"/>
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<File Type="NGDB-BLD" Name="b200.bld"/>
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<File Type="MAP-NCD" Name="b200.ncd"/>
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<File Type="MAP-MRP" Name="b200.mrp"/>
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<File Type="MAP-MAP" Name="b200.map"/>
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</Run>
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</Runs>
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@@ -1,10 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<DARoots Version="1" Minor="26">
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<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1">
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<Config>
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<Option Name="DesignMode" Val="RTL"/>
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<Option Name="TopAutoSet" Val="TRUE"/>
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<Option Name="SrcSet" Val="sources_1"/>
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</Config>
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</FileSet>
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</DARoots>
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@@ -1,26 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<DARoots Version="1" Minor="26">
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<FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1">
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<Filter Type="Srcs"/>
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<File Path="$PSRCDIR/sources_1/imports/build/b200.ngc">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../build/b200.ngc"/>
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<Attr Name="ImportTime" Val="1359508205"/>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<File Path="$PSRCDIR/sources_1/imports/coregen/fifo_4k_2clk.ngc">
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<FileInfo>
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<Attr Name="ImportPath" Val="$PPRDIR/../coregen/fifo_4k_2clk.ngc"/>
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<Attr Name="ImportTime" Val="1359144134"/>
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<Attr Name="UsedInSynthesis" Val="1"/>
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<Attr Name="UsedInImplementation" Val="1"/>
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</FileInfo>
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</File>
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<Config>
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<Option Name="DesignMode" Val="GateLvl"/>
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<Option Name="TopModule" Val="b200"/>
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</Config>
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</FileSet>
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</DARoots>
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@@ -1,12 +0,0 @@
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version:1
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:616464737263:31:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6564697466696e64:32:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6564697470726f70657274696573:31:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:66696c6565786974:31:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:6e657770726f6a656374:31:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:746f67676c657a6f6f6d617265616d6f6465:32:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:766965777461736b696d706c656d656e746174696f6e:31:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:7a6f6f6d666974:31:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:7a6f6f6d696e:3133:00:00
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70726f6a656374:706c616e5f61686561645f75736167655c6a6176615f636f6d6d616e645f68616e646c657273:7a6f6f6d6f7574:3137:00:00
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eof:1108508211
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@@ -1,3 +0,0 @@
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version:1
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6d6f64655f636f756e7465727c4755494d6f6465:1
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eof:
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@@ -1,38 +0,0 @@
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<?xml version="1.0" encoding="UTF-8" ?>
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<document>
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<!--The data in this file is primarily intended for consumption by Xilinx tools.
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The structure and the elements are likely to change over the next few releases.
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This means code written to parse this file will need to be revisited each subsequent release.-->
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<application name="pa" timeStamp="Tue Jan 29 17:42:17 2013">
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<section name="Project Information" visible="false">
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<property name="ProjectID" value="a2486f6b8cdf4e77be535de080ad1097" type="ProjectID"/>
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<property name="ProjectIteration" value="1" type="ProjectIteration"/>
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</section>
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<section name="PlanAhead Usage" visible="true">
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<item name="Project Data">
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<property name="SrcSetCount" value="1" type="SrcSetCount"/>
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<property name="ConstraintSetCount" value="1" type="ConstraintSetCount"/>
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<property name="DesignMode" value="GateLvl" type="DesignMode"/>
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<property name="ImplStrategy" value="ISE Defaults" type="ImplStrategy"/>
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</item>
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<item name="Java Command Handlers">
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<property name="AddSrc" value="1" type="JavaHandler"/>
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<property name="EditFind" value="2" type="JavaHandler"/>
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<property name="EditProperties" value="1" type="JavaHandler"/>
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<property name="FileExit" value="1" type="JavaHandler"/>
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<property name="NewProject" value="1" type="JavaHandler"/>
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<property name="ToggleZoomAreaMode" value="2" type="JavaHandler"/>
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<property name="ViewTaskImplementation" value="1" type="JavaHandler"/>
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<property name="ZoomFit" value="1" type="JavaHandler"/>
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<property name="ZoomIn" value="13" type="JavaHandler"/>
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<property name="ZoomOut" value="17" type="JavaHandler"/>
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</item>
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<item name="Other">
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<property name="GuiMode" value="1" type="GuiMode"/>
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<property name="BatchMode" value="0" type="BatchMode"/>
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<property name="TclMode" value="0" type="TclMode"/>
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<property name="ISEMode" value="0" type="ISEMode"/>
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</item>
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</section>
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</application>
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</document>
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