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fpga: x400: Add support for X410 motherboard FPGA

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Co-authored-by: Andrew Moch <Andrew.Moch@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>
Co-authored-by: Hector Rubio <hrubio@ni.com>


Original-commit: 6d3765605262016a80f71e36357f749ea35cbe5a
This commit is contained in:
Wade Fife
2021-06-10 11:56:58 -05:00
committed by Aaron Rossetto
co-authored by Andrew Moch Daniel Jepson Javier Valenzuela Joerg Hofrichter Kumaran Subramoniam Max Köhler Michael Auchter Paul Butler Hector Rubio
parent bfef20ea45
commit 61782b02d7
205 changed files with 299634 additions and 0 deletions
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top/x400/regmap/pl_cpld_regmap_utils.vh
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//
// Copyright 2021 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: pl_cpld_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// BASE : 0x0 (cpld_interface.v)
// MB_CPLD : 0x8000 (cpld_interface.v)
// DB0_CPLD : 0x10000 (cpld_interface.v)
// DB1_CPLD : 0x18000 (cpld_interface.v)
//===============================================================================
// RegTypes
//===============================================================================
//===============================================================================
// Register Group PL_CPLD_WINDOWS
//===============================================================================
// BASE Window (from cpld_interface.v)
localparam BASE = 'h0; // Window Offset
localparam BASE_SIZE = 'h40; // size in bytes
// MB_CPLD Window (from cpld_interface.v)
localparam MB_CPLD = 'h8000; // Window Offset
localparam MB_CPLD_SIZE = 'h8000; // size in bytes
// DB0_CPLD Window (from cpld_interface.v)
localparam DB0_CPLD = 'h10000; // Window Offset
localparam DB0_CPLD_SIZE = 'h8000; // size in bytes
// DB1_CPLD Window (from cpld_interface.v)
localparam DB1_CPLD = 'h18000; // Window Offset
localparam DB1_CPLD_SIZE = 'h8000; // size in bytes