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fpga: x400: Add support for X410 motherboard FPGA

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Co-authored-by: Andrew Moch <Andrew.Moch@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com>
Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com>
Co-authored-by: Max Köhler <max.koehler@ni.com>
Co-authored-by: Michael Auchter <michael.auchter@ni.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>
Co-authored-by: Hector Rubio <hrubio@ni.com>


Original-commit: 6d3765605262016a80f71e36357f749ea35cbe5a
This commit is contained in:
Wade Fife
2021-06-10 11:56:58 -05:00
committed by Aaron Rossetto
co-authored by Andrew Moch Daniel Jepson Javier Valenzuela Joerg Hofrichter Kumaran Subramoniam Max Köhler Michael Auchter Paul Butler Hector Rubio
parent bfef20ea45
commit 61782b02d7
205 changed files with 299634 additions and 0 deletions
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top/x400/regmap/dio_regmap_utils.vh
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//
// Copyright 2021 Ettus Research, A National Instruments Company
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Module: dio_regmap_utils.vh
// Description:
// The constants in this file are autogenerated by XmlParse.
//===============================================================================
// A numerically ordered list of registers and their HDL source files
//===============================================================================
// DIO_MASTER_REGISTER : 0x0 (x4xx_dio.v)
// DIO_DIRECTION_REGISTER : 0x4 (x4xx_dio.v)
// DIO_INPUT_REGISTER : 0x8 (x4xx_dio.v)
// DIO_OUTPUT_REGISTER : 0xC (x4xx_dio.v)
//===============================================================================
// RegTypes
//===============================================================================
//===============================================================================
// Register Group DIO_REGS
//===============================================================================
// DIO_MASTER_REGISTER Register (from x4xx_dio.v)
localparam DIO_MASTER_REGISTER = 'h0; // Register Offset
localparam DIO_MASTER_REGISTER_SIZE = 32; // register width in bits
localparam DIO_MASTER_REGISTER_MASK = 32'hFFF0FFF;
localparam DIO_MASTER_A_SIZE = 12; //DIO_MASTER_REGISTER:DIO_MASTER_A
localparam DIO_MASTER_A_MSB = 11; //DIO_MASTER_REGISTER:DIO_MASTER_A
localparam DIO_MASTER_A = 0; //DIO_MASTER_REGISTER:DIO_MASTER_A
localparam DIO_MASTER_B_SIZE = 12; //DIO_MASTER_REGISTER:DIO_MASTER_B
localparam DIO_MASTER_B_MSB = 27; //DIO_MASTER_REGISTER:DIO_MASTER_B
localparam DIO_MASTER_B = 16; //DIO_MASTER_REGISTER:DIO_MASTER_B
// DIO_DIRECTION_REGISTER Register (from x4xx_dio.v)
localparam DIO_DIRECTION_REGISTER = 'h4; // Register Offset
localparam DIO_DIRECTION_REGISTER_SIZE = 32; // register width in bits
localparam DIO_DIRECTION_REGISTER_MASK = 32'hFFF0FFF;
localparam DIO_DIRECTION_A_SIZE = 12; //DIO_DIRECTION_REGISTER:DIO_DIRECTION_A
localparam DIO_DIRECTION_A_MSB = 11; //DIO_DIRECTION_REGISTER:DIO_DIRECTION_A
localparam DIO_DIRECTION_A = 0; //DIO_DIRECTION_REGISTER:DIO_DIRECTION_A
localparam DIO_DIRECTION_B_SIZE = 12; //DIO_DIRECTION_REGISTER:DIO_DIRECTION_B
localparam DIO_DIRECTION_B_MSB = 27; //DIO_DIRECTION_REGISTER:DIO_DIRECTION_B
localparam DIO_DIRECTION_B = 16; //DIO_DIRECTION_REGISTER:DIO_DIRECTION_B
// DIO_INPUT_REGISTER Register (from x4xx_dio.v)
localparam DIO_INPUT_REGISTER = 'h8; // Register Offset
localparam DIO_INPUT_REGISTER_SIZE = 32; // register width in bits
localparam DIO_INPUT_REGISTER_MASK = 32'hFFF0FFF;
localparam DIO_INPUT_A_SIZE = 12; //DIO_INPUT_REGISTER:DIO_INPUT_A
localparam DIO_INPUT_A_MSB = 11; //DIO_INPUT_REGISTER:DIO_INPUT_A
localparam DIO_INPUT_A = 0; //DIO_INPUT_REGISTER:DIO_INPUT_A
localparam DIO_INPUT_B_SIZE = 12; //DIO_INPUT_REGISTER:DIO_INPUT_B
localparam DIO_INPUT_B_MSB = 27; //DIO_INPUT_REGISTER:DIO_INPUT_B
localparam DIO_INPUT_B = 16; //DIO_INPUT_REGISTER:DIO_INPUT_B
// DIO_OUTPUT_REGISTER Register (from x4xx_dio.v)
localparam DIO_OUTPUT_REGISTER = 'hC; // Register Offset
localparam DIO_OUTPUT_REGISTER_SIZE = 32; // register width in bits
localparam DIO_OUTPUT_REGISTER_MASK = 32'hFFF0FFF;
localparam DIO_OUTPUT_A_SIZE = 12; //DIO_OUTPUT_REGISTER:DIO_OUTPUT_A
localparam DIO_OUTPUT_A_MSB = 11; //DIO_OUTPUT_REGISTER:DIO_OUTPUT_A
localparam DIO_OUTPUT_A = 0; //DIO_OUTPUT_REGISTER:DIO_OUTPUT_A
localparam DIO_OUTPUT_B_SIZE = 12; //DIO_OUTPUT_REGISTER:DIO_OUTPUT_B
localparam DIO_OUTPUT_B_MSB = 27; //DIO_OUTPUT_REGISTER:DIO_OUTPUT_B
localparam DIO_OUTPUT_B = 16; //DIO_OUTPUT_REGISTER:DIO_OUTPUT_B