fpga: x400: Add support for X410 motherboard FPGA
Co-authored-by: Andrew Moch <Andrew.Moch@ni.com> Co-authored-by: Daniel Jepson <daniel.jepson@ni.com> Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com> Co-authored-by: Joerg Hofrichter <joerg.hofrichter@ni.com> Co-authored-by: Kumaran Subramoniam <kumaran.subramoniam@ni.com> Co-authored-by: Max Köhler <max.koehler@ni.com> Co-authored-by: Michael Auchter <michael.auchter@ni.com> Co-authored-by: Paul Butler <paul.butler@ni.com> Co-authored-by: Wade Fife <wade.fife@ettus.com> Co-authored-by: Hector Rubio <hrubio@ni.com> Original-commit: 6d3765605262016a80f71e36357f749ea35cbe5a
This commit is contained in:
committed by
Aaron Rossetto
co-authored by
Andrew Moch
Daniel Jepson
Javier Valenzuela
Joerg Hofrichter
Kumaran Subramoniam
Max Köhler
Michael Auchter
Paul Butler
Hector Rubio
parent
bfef20ea45
commit
61782b02d7
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#
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# Copyright 2021 Ettus Research, a National Instruments Brand
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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include $(TOOLS_DIR)/make/viv_ip_builder.mak
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IP_ADC_100M_ORIG_SRCS = $(addprefix $(IP_DIR)/adc_100m_bd/, \
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adc_100m_bd.tcl \
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)
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IP_ADC_100M_HDL_SRCS = $(addprefix $(BASE_DIR)/x400/rf/, \
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100m/ddc_saturate.vhd \
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100m/adc_3_1_clk_converter.vhd \
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100m/adc_gearbox_2x1.v \
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common/PkgRf.vhd \
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common/scale_2x.vhd \
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)
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IP_ADC_100M_BDTCL_SRCS = $(addprefix $(IP_BUILD_DIR)/adc_100m_bd/, \
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adc_100m_bd.tcl \
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)
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IP_ADC_100M_BD_SRCS = $(addprefix $(IP_BUILD_DIR)/adc_100m_bd/, \
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adc_100m_bd/adc_100m_bd.bd \
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)
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BD_ADC_100M_BD_OUTS = $(addprefix $(IP_BUILD_DIR)/adc_100m_bd/, \
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adc_100m_bd.bd.out \
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adc_100m_bd/adc_100m_bd_ooc.xdc \
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adc_100m_bd/synth/adc_100m_bd.v \
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)
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EMPTY_IP_SRCS =
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$(IP_ADC_100M_BD_SRCS) $(BD_ADC_100M_BD_OUTS) $(IP_ADC_100M_BDTCL_SRCS): $(IP_ADC_100M_ORIG_SRCS) $(IP_ADC_100M_HDL_SRCS)
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$(call BUILD_VIVADO_BDTCL,adc_100m_bd,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),$(EMPTY_IP_SRCS),$(IP_ADC_100M_HDL_SRCS),)
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