fpga: updating b200 and x300 FPGA source code for latest images

Original-commit: 00711ba213dde8aa0a099d2b18d3da0a33e6af79
2014-05-14 11:42:19 -07:00
parent 8f1cfd55b1
commit 5a525c84f5
71 changed files with 117080 additions and 4101 deletions
@@ -215,7 +215,7 @@ module x300_pcie_int_tb();
        TEST_CASE();
        usr_regport_request(READ, 20'hC, 32'h0);
        usr_regport_response();
-        `CHECK_TRUE((pcie_usr_data == 175000000), "Verify counter frequency register");
+        `CHECK_TRUE((pcie_usr_data == 166666667), "Verify counter frequency register");

        TEST_CASE();
        usr_regport_request(WRITE, 20'h10, 32'hDEAD);