fpga: Update rfnoc_image_core for all targets

Update rfnoc_image_core.v to take into account the new image_core_name
fields and version strings. Add new rfnoc_image_core.vh. Update YAML
where needed.


Original-commit: b0033158a4c520063540881451d8daac91e98714
This commit is contained in:
Wade Fife
2021-06-10 11:56:58 -05:00
committed by Aaron Rossetto
parent 235703e806
commit 43e32abd11
18 changed files with 6493 additions and 5781 deletions
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+21
View File
@@ -0,0 +1,21 @@
//
// Copyright 2021 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Header: rfnoc_image_core.vh (for n300)
//
// Description:
//
// This is the header file for the RFNoC Image Core.
//
// This file was automatically generated by the RFNoC image builder tool.
// Re-running that tool will overwrite this file!
//
// File generated on: 2021-05-03T08:51:08.505495
// Source: n300_rfnoc_image_core.yml
// Source SHA256: 64f2b862b3e60cb0456befb88ea28825b6bba271ff4e86a24ab618932773a861
//
`define CHDR_WIDTH 64
`define RFNOC_PROTOVER { 8'd1, 8'd0 }
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+21
View File
@@ -0,0 +1,21 @@
//
// Copyright 2021 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Header: rfnoc_image_core.vh (for n310)
//
// Description:
//
// This is the header file for the RFNoC Image Core.
//
// This file was automatically generated by the RFNoC image builder tool.
// Re-running that tool will overwrite this file!
//
// File generated on: 2021-05-03T08:51:09.279594
// Source: n310_rfnoc_image_core.yml
// Source SHA256: cc561a3de48fea9e224425413802738d125393f55f6dd46e196db8fdabe09284
//
`define CHDR_WIDTH 64
`define RFNOC_PROTOVER { 8'd1, 8'd0 }
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
+21
View File
@@ -0,0 +1,21 @@
//
// Copyright 2021 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
// Header: rfnoc_image_core.vh (for n320)
//
// Description:
//
// This is the header file for the RFNoC Image Core.
//
// This file was automatically generated by the RFNoC image builder tool.
// Re-running that tool will overwrite this file!
//
// File generated on: 2021-05-03T08:51:09.997079
// Source: n320_rfnoc_image_core.yml
// Source SHA256: 3c3a33be8bc2e3b3a7268ba3e07001c6dc6c21af4c9027309a787ac8404e5e8f
//
`define CHDR_WIDTH 64
`define RFNOC_PROTOVER { 8'd1, 8'd0 }