fpga: lib: Add modports to SV AXI-Stream blocks

Original-commit: da46dddbebab2ddb1f25f2f200431c2299b395f4

lib/axi4s_sv/axi4s_width_conv.sv

@@ -25,8 +25,8 @@ module axi4s_width_conv #(
   bit    O_USER_TRAILING_BYTES = 0,
   bit    SYNC_CLKS = 1
 ) (
-   interface   i,  // AxiStreamIf or AxiStreamPacketIf
-   interface   o   // AxiStreamIf or AxiStreamPacketIf
+   interface.slave   i,  // AxiStreamIf or AxiStreamPacketIf
+   interface.master  o   // AxiStreamIf or AxiStreamPacketIf
 );
 
   localparam IWIDTH =i.DATA_WIDTH;