fpga: sim: Update struct enum initialization

In Vivado 2021.1, it is no longer allowed to use "default: 0" to
initialize an enum within a packed struct. So we must initalize enum
data members explicitly now.


Original-commit: 8007b6b4dff5b64d476b2e3ccb68a777c2f02c8b

lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv

@@ -310,6 +310,7 @@ module chdr_stream_endpoint_tb#(
     // Iterate over stream commands to test
     foreach (op[i]) begin
       chdr_hdr = '{
+        pkt_type : CHDR_STRM_CMD,
         dst_epid : dst_epid,
         seq_num  : seq_num,
         default  : 0
@@ -480,6 +481,7 @@ module chdr_stream_endpoint_tb#(
       ctrl_ts = $urandom();
       ctrl_op = '{
         default      : '0,
+        status       : CTRL_STS_OKAY,
         op_code      : ctrl_opcode_t'($urandom_range(9)),
         byte_enable  : $urandom_range(15),
         address      : $urandom()

lib/rfnoc/sim/ctrlport_endpoint_tb/ctrlport_endpoint_tb.sv

@@ -305,6 +305,7 @@ module ctrlport_endpoint_tb;
     };
     op_word = '{
       default      : '0,
+      status       : CTRL_STS_OKAY,
       op_code      : ctrl_opcode_t'(opcode),
       byte_enable  : byte_en,
       address      : addr