From 3fc345d3aef23ac54f7a4f3e57ea11ef7e12c488 Mon Sep 17 00:00:00 2001
From: Wade Fife <wade.fife@ettus.com>
Date: Thu, 16 Jun 2022 12:58:04 -0500
Subject: [PATCH] fpga: sim: Update struct enum initialization

In Vivado 2021.1, it is no longer allowed to use "default: 0" to
initialize an enum within a packed struct. So we must initalize enum
data members explicitly now.


Original-commit: 8007b6b4dff5b64d476b2e3ccb68a777c2f02c8b
---
 .../sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv  | 2 ++
 lib/rfnoc/sim/ctrlport_endpoint_tb/ctrlport_endpoint_tb.sv  | 1 +
 lib/sim/rfnoc/axi_rate_change/axi_rate_change_tb.sv         | 2 +-
 sim/rfnoc/PkgCtrlIfaceBfm.sv                                | 6 ++++--
 4 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv b/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv
index 14d412a..f9dde3c 100644
--- a/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv
+++ b/lib/rfnoc/sim/chdr_stream_endpoint_tb/chdr_stream_endpoint_tb.sv
@@ -310,6 +310,7 @@ module chdr_stream_endpoint_tb#(
     // Iterate over stream commands to test
     foreach (op[i]) begin
       chdr_hdr = '{
+        pkt_type : CHDR_STRM_CMD,
         dst_epid : dst_epid,
         seq_num  : seq_num,
         default  : 0
@@ -480,6 +481,7 @@ module chdr_stream_endpoint_tb#(
       ctrl_ts = $urandom();
       ctrl_op = '{
         default      : '0,
+        status       : CTRL_STS_OKAY,
         op_code      : ctrl_opcode_t'($urandom_range(9)),
         byte_enable  : $urandom_range(15),
         address      : $urandom()
diff --git a/lib/rfnoc/sim/ctrlport_endpoint_tb/ctrlport_endpoint_tb.sv b/lib/rfnoc/sim/ctrlport_endpoint_tb/ctrlport_endpoint_tb.sv
index 492e488..ffb56fb 100644
--- a/lib/rfnoc/sim/ctrlport_endpoint_tb/ctrlport_endpoint_tb.sv
+++ b/lib/rfnoc/sim/ctrlport_endpoint_tb/ctrlport_endpoint_tb.sv
@@ -305,6 +305,7 @@ module ctrlport_endpoint_tb;
     };
     op_word = '{
       default      : '0,
+      status       : CTRL_STS_OKAY,
       op_code      : ctrl_opcode_t'(opcode),
       byte_enable  : byte_en,
       address      : addr
diff --git a/lib/sim/rfnoc/axi_rate_change/axi_rate_change_tb.sv b/lib/sim/rfnoc/axi_rate_change/axi_rate_change_tb.sv
index b16c2d2..55f82a1 100644
--- a/lib/sim/rfnoc/axi_rate_change/axi_rate_change_tb.sv
+++ b/lib/sim/rfnoc/axi_rate_change/axi_rate_change_tb.sv
@@ -153,7 +153,7 @@ module axi_rate_change_tb();
 
         while (words_left_to_send > 0) begin
           // Setup header
-          send_header = '{default:0};
+          send_header = '0;
           send_header.has_time = 1;
           send_header.timestamp = longint'(timestamp);
           send_header.eob = (words_left_to_send <= spp);
diff --git a/sim/rfnoc/PkgCtrlIfaceBfm.sv b/sim/rfnoc/PkgCtrlIfaceBfm.sv
index 0773eee..b687288 100644
--- a/sim/rfnoc/PkgCtrlIfaceBfm.sv
+++ b/sim/rfnoc/PkgCtrlIfaceBfm.sv
@@ -61,8 +61,9 @@ package PkgCtrlIfaceBfm;
         default  : 0
       };
       ctrl_packet.op_word = '{
+        status      : CTRL_STS_OKAY,
         op_code     : CTRL_OP_READ,
-        byte_enable : ~0,
+        byte_enable : '1,
         address     : addr,
         default     : 0
       };
@@ -101,8 +102,9 @@ package PkgCtrlIfaceBfm;
         default  : 0
       };
       ctrl_packet.op_word = '{
+        status      : CTRL_STS_OKAY,
         op_code     : CTRL_OP_WRITE,
-        byte_enable : ~0,
+        byte_enable : '1,
         address     : addr,
         default     : 0
       };