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fpga: Update all RFNoC images

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Original-commit: 002ff9698e09b94c396736613e493f79e9c56442
This commit is contained in:
Wade Fife
2022-03-31 13:51:23 -07:00
committed by Aaron Rossetto
parent b81ab96b12
commit 16c1235b30
29 changed files with 508 additions and 468 deletions
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top/n3xx/n320_rfnoc_image_core.v
+50 -46
View File
@@ -1,5 +1,5 @@
//
// Copyright 2021 Ettus Research, A National Instruments Brand
// Copyright 2022 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
@@ -13,9 +13,9 @@
// This file was automatically generated by the RFNoC image builder tool.
// Re-running that tool will overwrite this file!
//
// File generated on: 2021-05-03T08:51:09.950905
// File generated on: 2022-03-29T22:54:31.762363
// Source: n320_rfnoc_image_core.yml
// Source SHA256: 3c3a33be8bc2e3b3a7268ba3e07001c6dc6c21af4c9027309a787ac8404e5e8f
// Source SHA256: da09e3fb9d6174f301388ddad69e378ce4505b9c9b7f1bc85075880566e98788
//
`default_nettype none
@@ -60,26 +60,26 @@ module rfnoc_image_core #(
input wire [ 0:0] m_ctrlport_radio1_resp_ack,
input wire [ 1:0] m_ctrlport_radio1_resp_status,
input wire [ 31:0] m_ctrlport_radio1_resp_data,
// time_keeper
// time
input wire [ 63:0] radio_time,
// radio_ch0
input wire [ 31:0] radio_rx_data_radio0,
input wire [ 0:0] radio_rx_stb_radio0,
output wire [ 0:0] radio_rx_running_radio0,
output wire [ 31:0] radio_tx_data_radio0,
input wire [ 0:0] radio_tx_stb_radio0,
output wire [ 0:0] radio_tx_running_radio0,
// radio_ch1
input wire [ 31:0] radio_rx_data_radio1,
input wire [ 0:0] radio_rx_stb_radio1,
output wire [ 0:0] radio_rx_running_radio1,
output wire [ 31:0] radio_tx_data_radio1,
input wire [ 0:0] radio_tx_stb_radio1,
output wire [ 0:0] radio_tx_running_radio1,
// radio0
input wire [ 255:0] radio_rx_data_radio0,
input wire [ 7:0] radio_rx_stb_radio0,
output wire [ 7:0] radio_rx_running_radio0,
output wire [ 255:0] radio_tx_data_radio0,
input wire [ 7:0] radio_tx_stb_radio0,
output wire [ 7:0] radio_tx_running_radio0,
// radio1
input wire [ 255:0] radio_rx_data_radio1,
input wire [ 7:0] radio_rx_stb_radio1,
output wire [ 7:0] radio_rx_running_radio1,
output wire [ 255:0] radio_tx_data_radio1,
input wire [ 7:0] radio_tx_stb_radio1,
output wire [ 7:0] radio_tx_running_radio1,
// dram
input wire [ 0:0] axi_rst,
output wire [ 3:0] m_axi_awid,
output wire [ 127:0] m_axi_awaddr,
output wire [ 191:0] m_axi_awaddr,
output wire [ 31:0] m_axi_awlen,
output wire [ 11:0] m_axi_awsize,
output wire [ 7:0] m_axi_awburst,
@@ -91,8 +91,8 @@ module rfnoc_image_core #(
output wire [ 3:0] m_axi_awuser,
output wire [ 3:0] m_axi_awvalid,
input wire [ 3:0] m_axi_awready,
output wire [ 255:0] m_axi_wdata,
output wire [ 31:0] m_axi_wstrb,
output wire [2047:0] m_axi_wdata,
output wire [ 255:0] m_axi_wstrb,
output wire [ 3:0] m_axi_wlast,
output wire [ 3:0] m_axi_wuser,
output wire [ 3:0] m_axi_wvalid,
@@ -103,7 +103,7 @@ module rfnoc_image_core #(
input wire [ 3:0] m_axi_bvalid,
output wire [ 3:0] m_axi_bready,
output wire [ 3:0] m_axi_arid,
output wire [ 127:0] m_axi_araddr,
output wire [ 191:0] m_axi_araddr,
output wire [ 31:0] m_axi_arlen,
output wire [ 11:0] m_axi_arsize,
output wire [ 7:0] m_axi_arburst,
@@ -116,7 +116,7 @@ module rfnoc_image_core #(
output wire [ 3:0] m_axi_arvalid,
input wire [ 3:0] m_axi_arready,
input wire [ 3:0] m_axi_rid,
input wire [ 255:0] m_axi_rdata,
input wire [2047:0] m_axi_rdata,
input wire [ 7:0] m_axi_rresp,
input wire [ 3:0] m_axi_rlast,
input wire [ 3:0] m_axi_ruser,
@@ -718,7 +718,7 @@ module rfnoc_image_core #(
wire m_radio0_out_0_tvalid;
wire m_radio0_out_0_tready;
// ctrl_port
// ctrlport
wire [ 0:0] radio0_m_ctrlport_req_wr;
wire [ 0:0] radio0_m_ctrlport_req_rd;
wire [ 19:0] radio0_m_ctrlport_req_addr;
@@ -729,20 +729,22 @@ module rfnoc_image_core #(
wire [ 0:0] radio0_m_ctrlport_resp_ack;
wire [ 1:0] radio0_m_ctrlport_resp_status;
wire [ 31:0] radio0_m_ctrlport_resp_data;
// time_keeper
// time
wire [ 63:0] radio0_radio_time;
// radio_iface
wire [ 31:0] radio0_radio_rx_data;
wire [ 0:0] radio0_radio_rx_stb;
wire [ 0:0] radio0_radio_rx_running;
wire [ 31:0] radio0_radio_tx_data;
wire [ 0:0] radio0_radio_tx_stb;
wire [ 0:0] radio0_radio_tx_running;
// radio
wire [ 255:0] radio0_radio_rx_data;
wire [ 7:0] radio0_radio_rx_stb;
wire [ 7:0] radio0_radio_rx_running;
wire [ 255:0] radio0_radio_tx_data;
wire [ 7:0] radio0_radio_tx_stb;
wire [ 7:0] radio0_radio_tx_running;
rfnoc_block_radio #(
.THIS_PORTID (4),
.CHDR_W (CHDR_W),
.NUM_PORTS (1),
.NIPC (1),
.ITEM_W (32),
.MTU (MTU)
) b_radio0_2 (
.rfnoc_chdr_clk (rfnoc_chdr_clk),
@@ -889,7 +891,7 @@ module rfnoc_image_core #(
wire m_radio1_out_0_tvalid;
wire m_radio1_out_0_tready;
// ctrl_port
// ctrlport
wire [ 0:0] radio1_m_ctrlport_req_wr;
wire [ 0:0] radio1_m_ctrlport_req_rd;
wire [ 19:0] radio1_m_ctrlport_req_addr;
@@ -900,20 +902,22 @@ module rfnoc_image_core #(
wire [ 0:0] radio1_m_ctrlport_resp_ack;
wire [ 1:0] radio1_m_ctrlport_resp_status;
wire [ 31:0] radio1_m_ctrlport_resp_data;
// time_keeper
// time
wire [ 63:0] radio1_radio_time;
// radio_iface
wire [ 31:0] radio1_radio_rx_data;
wire [ 0:0] radio1_radio_rx_stb;
wire [ 0:0] radio1_radio_rx_running;
wire [ 31:0] radio1_radio_tx_data;
wire [ 0:0] radio1_radio_tx_stb;
wire [ 0:0] radio1_radio_tx_running;
// radio
wire [ 255:0] radio1_radio_rx_data;
wire [ 7:0] radio1_radio_rx_stb;
wire [ 7:0] radio1_radio_rx_running;
wire [ 255:0] radio1_radio_tx_data;
wire [ 7:0] radio1_radio_tx_stb;
wire [ 7:0] radio1_radio_tx_running;
rfnoc_block_radio #(
.THIS_PORTID (7),
.CHDR_W (CHDR_W),
.NUM_PORTS (1),
.NIPC (1),
.ITEM_W (32),
.MTU (MTU)
) b_radio1_5 (
.rfnoc_chdr_clk (rfnoc_chdr_clk),
@@ -973,7 +977,7 @@ module rfnoc_image_core #(
// axi_ram
wire [ 0:0] replay0_axi_rst;
wire [ 3:0] replay0_m_axi_awid;
wire [ 127:0] replay0_m_axi_awaddr;
wire [ 191:0] replay0_m_axi_awaddr;
wire [ 31:0] replay0_m_axi_awlen;
wire [ 11:0] replay0_m_axi_awsize;
wire [ 7:0] replay0_m_axi_awburst;
@@ -985,8 +989,8 @@ module rfnoc_image_core #(
wire [ 3:0] replay0_m_axi_awuser;
wire [ 3:0] replay0_m_axi_awvalid;
wire [ 3:0] replay0_m_axi_awready;
wire [ 255:0] replay0_m_axi_wdata;
wire [ 31:0] replay0_m_axi_wstrb;
wire [2047:0] replay0_m_axi_wdata;
wire [ 255:0] replay0_m_axi_wstrb;
wire [ 3:0] replay0_m_axi_wlast;
wire [ 3:0] replay0_m_axi_wuser;
wire [ 3:0] replay0_m_axi_wvalid;
@@ -997,7 +1001,7 @@ module rfnoc_image_core #(
wire [ 3:0] replay0_m_axi_bvalid;
wire [ 3:0] replay0_m_axi_bready;
wire [ 3:0] replay0_m_axi_arid;
wire [ 127:0] replay0_m_axi_araddr;
wire [ 191:0] replay0_m_axi_araddr;
wire [ 31:0] replay0_m_axi_arlen;
wire [ 11:0] replay0_m_axi_arsize;
wire [ 7:0] replay0_m_axi_arburst;
@@ -1010,7 +1014,7 @@ module rfnoc_image_core #(
wire [ 3:0] replay0_m_axi_arvalid;
wire [ 3:0] replay0_m_axi_arready;
wire [ 3:0] replay0_m_axi_rid;
wire [ 255:0] replay0_m_axi_rdata;
wire [2047:0] replay0_m_axi_rdata;
wire [ 7:0] replay0_m_axi_rresp;
wire [ 3:0] replay0_m_axi_rlast;
wire [ 3:0] replay0_m_axi_ruser;