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fpga: Update all RFNoC images

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Original-commit: 002ff9698e09b94c396736613e493f79e9c56442
This commit is contained in:
Wade Fife
2022-03-31 13:51:23 -07:00
committed by Aaron Rossetto
parent b81ab96b12
commit 16c1235b30
29 changed files with 508 additions and 468 deletions
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top/n3xx/n320_bist_image_core.v
+55 -49
View File
@@ -13,9 +13,9 @@
// This file was automatically generated by the RFNoC image builder tool.
// Re-running that tool will overwrite this file!
//
// File generated on: 2022-03-28T12:13:45.909428
// File generated on: 2022-03-29T22:54:30.534235
// Source: n320_bist_image_core.yml
// Source SHA256: aca3751d49ba6f7564282ae55c6368b2cfa11abd1a8abd77af3f4d5cf498e67b
// Source SHA256: 85209582ce2582c5b4469cd57f17249332a777088bca62c20406409eaf3116ec
//
`default_nettype none
@@ -60,22 +60,22 @@ module rfnoc_image_core #(
input wire [ 0:0] m_ctrlport_radio1_resp_ack,
input wire [ 1:0] m_ctrlport_radio1_resp_status,
input wire [ 31:0] m_ctrlport_radio1_resp_data,
// time_keeper
// time
input wire [ 63:0] radio_time,
// radio_ch0
input wire [ 31:0] radio_rx_data_radio0,
input wire [ 0:0] radio_rx_stb_radio0,
output wire [ 0:0] radio_rx_running_radio0,
output wire [ 31:0] radio_tx_data_radio0,
input wire [ 0:0] radio_tx_stb_radio0,
output wire [ 0:0] radio_tx_running_radio0,
// radio_ch1
input wire [ 31:0] radio_rx_data_radio1,
input wire [ 0:0] radio_rx_stb_radio1,
output wire [ 0:0] radio_rx_running_radio1,
output wire [ 31:0] radio_tx_data_radio1,
input wire [ 0:0] radio_tx_stb_radio1,
output wire [ 0:0] radio_tx_running_radio1,
// radio0
input wire [ 255:0] radio_rx_data_radio0,
input wire [ 7:0] radio_rx_stb_radio0,
output wire [ 7:0] radio_rx_running_radio0,
output wire [ 255:0] radio_tx_data_radio0,
input wire [ 7:0] radio_tx_stb_radio0,
output wire [ 7:0] radio_tx_running_radio0,
// radio1
input wire [ 255:0] radio_rx_data_radio1,
input wire [ 7:0] radio_rx_stb_radio1,
output wire [ 7:0] radio_rx_running_radio1,
output wire [ 255:0] radio_tx_data_radio1,
input wire [ 7:0] radio_tx_stb_radio1,
output wire [ 7:0] radio_tx_running_radio1,
// dram
input wire [ 0:0] axi_rst,
output wire [ 3:0] m_axi_awid,
@@ -612,7 +612,7 @@ module rfnoc_image_core #(
wire m_radio0_out_0_tvalid;
wire m_radio0_out_0_tready;
// ctrl_port
// ctrlport
wire [ 0:0] radio0_m_ctrlport_req_wr;
wire [ 0:0] radio0_m_ctrlport_req_rd;
wire [ 19:0] radio0_m_ctrlport_req_addr;
@@ -623,20 +623,22 @@ module rfnoc_image_core #(
wire [ 0:0] radio0_m_ctrlport_resp_ack;
wire [ 1:0] radio0_m_ctrlport_resp_status;
wire [ 31:0] radio0_m_ctrlport_resp_data;
// time_keeper
// time
wire [ 63:0] radio0_radio_time;
// radio_iface
wire [ 31:0] radio0_radio_rx_data;
wire [ 0:0] radio0_radio_rx_stb;
wire [ 0:0] radio0_radio_rx_running;
wire [ 31:0] radio0_radio_tx_data;
wire [ 0:0] radio0_radio_tx_stb;
wire [ 0:0] radio0_radio_tx_running;
// radio
wire [ 255:0] radio0_radio_rx_data;
wire [ 7:0] radio0_radio_rx_stb;
wire [ 7:0] radio0_radio_rx_running;
wire [ 255:0] radio0_radio_tx_data;
wire [ 7:0] radio0_radio_tx_stb;
wire [ 7:0] radio0_radio_tx_running;
rfnoc_block_radio #(
.THIS_PORTID (2),
.CHDR_W (CHDR_W),
.NUM_PORTS (1),
.NIPC (1),
.ITEM_W (32),
.MTU (MTU)
) b_radio0_0 (
.rfnoc_chdr_clk (rfnoc_chdr_clk),
@@ -693,7 +695,7 @@ module rfnoc_image_core #(
wire m_radio1_out_0_tvalid;
wire m_radio1_out_0_tready;
// ctrl_port
// ctrlport
wire [ 0:0] radio1_m_ctrlport_req_wr;
wire [ 0:0] radio1_m_ctrlport_req_rd;
wire [ 19:0] radio1_m_ctrlport_req_addr;
@@ -704,20 +706,22 @@ module rfnoc_image_core #(
wire [ 0:0] radio1_m_ctrlport_resp_ack;
wire [ 1:0] radio1_m_ctrlport_resp_status;
wire [ 31:0] radio1_m_ctrlport_resp_data;
// time_keeper
// time
wire [ 63:0] radio1_radio_time;
// radio_iface
wire [ 31:0] radio1_radio_rx_data;
wire [ 0:0] radio1_radio_rx_stb;
wire [ 0:0] radio1_radio_rx_running;
wire [ 31:0] radio1_radio_tx_data;
wire [ 0:0] radio1_radio_tx_stb;
wire [ 0:0] radio1_radio_tx_running;
// radio
wire [ 255:0] radio1_radio_rx_data;
wire [ 7:0] radio1_radio_rx_stb;
wire [ 7:0] radio1_radio_rx_running;
wire [ 255:0] radio1_radio_tx_data;
wire [ 7:0] radio1_radio_tx_stb;
wire [ 7:0] radio1_radio_tx_running;
rfnoc_block_radio #(
.THIS_PORTID (3),
.CHDR_W (CHDR_W),
.NUM_PORTS (1),
.NIPC (1),
.ITEM_W (32),
.MTU (MTU)
) b_radio1_1 (
.rfnoc_chdr_clk (rfnoc_chdr_clk),
@@ -830,6 +834,8 @@ module rfnoc_image_core #(
.FIFO_ADDR_BASE ({31'h06000000, 31'h04000000, 31'h02000000, 31'h00000000}),
.FIFO_ADDR_MASK ({31'h01FFFFFF, 31'h01FFFFFF, 31'h01FFFFFF, 31'h01FFFFFF}),
.MEM_CLK_RATE (303819444),
.IN_FIFO_SIZE (),
.OUT_FIFO_SIZE (),
.MTU (MTU)
) b_fifo0_2 (
.rfnoc_chdr_clk (rfnoc_chdr_clk),
@@ -995,20 +1001,6 @@ module rfnoc_image_core #(
assign radio1_m_ctrlport_resp_status = m_ctrlport_radio1_resp_status;
assign radio1_m_ctrlport_resp_data = m_ctrlport_radio1_resp_data;
assign radio0_radio_rx_data = radio_rx_data_radio0;
assign radio0_radio_rx_stb = radio_rx_stb_radio0;
assign radio_rx_running_radio0 = radio0_radio_rx_running;
assign radio_tx_data_radio0 = radio0_radio_tx_data;
assign radio0_radio_tx_stb = radio_tx_stb_radio0;
assign radio_tx_running_radio0 = radio0_radio_tx_running;
assign radio1_radio_rx_data = radio_rx_data_radio1;
assign radio1_radio_rx_stb = radio_rx_stb_radio1;
assign radio_rx_running_radio1 = radio1_radio_rx_running;
assign radio_tx_data_radio1 = radio1_radio_tx_data;
assign radio1_radio_tx_stb = radio_tx_stb_radio1;
assign radio_tx_running_radio1 = radio1_radio_tx_running;
assign fifo0_axi_rst = axi_rst;
assign m_axi_awid = fifo0_m_axi_awid;
assign m_axi_awaddr = fifo0_m_axi_awaddr;
@@ -1055,6 +1047,20 @@ module rfnoc_image_core #(
assign fifo0_m_axi_rvalid = m_axi_rvalid;
assign m_axi_rready = fifo0_m_axi_rready;
assign radio0_radio_rx_data = radio_rx_data_radio0;
assign radio0_radio_rx_stb = radio_rx_stb_radio0;
assign radio_rx_running_radio0 = radio0_radio_rx_running;
assign radio_tx_data_radio0 = radio0_radio_tx_data;
assign radio0_radio_tx_stb = radio_tx_stb_radio0;
assign radio_tx_running_radio0 = radio0_radio_tx_running;
assign radio1_radio_rx_data = radio_rx_data_radio1;
assign radio1_radio_rx_stb = radio_rx_stb_radio1;
assign radio_rx_running_radio1 = radio1_radio_rx_running;
assign radio_tx_data_radio1 = radio1_radio_tx_data;
assign radio1_radio_tx_stb = radio_tx_stb_radio1;
assign radio_tx_running_radio1 = radio1_radio_tx_running;
// Broadcaster/Listener Connections:
assign radio0_radio_time = radio_time;