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fpga: Update all RFNoC images

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Original-commit: 002ff9698e09b94c396736613e493f79e9c56442
This commit is contained in:
Wade Fife
2022-03-31 13:51:23 -07:00
committed by Aaron Rossetto
parent b81ab96b12
commit 16c1235b30
29 changed files with 508 additions and 468 deletions
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top/e320/e320_rfnoc_image_core.vh
+3 -3
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@@ -1,5 +1,5 @@
//
// Copyright 2021 Ettus Research, A National Instruments Brand
// Copyright 2022 Ettus Research, A National Instruments Brand
//
// SPDX-License-Identifier: LGPL-3.0-or-later
//
@@ -12,9 +12,9 @@
// This file was automatically generated by the RFNoC image builder tool.
// Re-running that tool will overwrite this file!
//
// File generated on: 2021-05-03T08:51:10.746455
// File generated on: 2022-03-29T22:54:33.447436
// Source: e320_rfnoc_image_core.yml
// Source SHA256: 8b38ab7ba86e214c213ab62a63b698739c0858fdf10fcc5b737f87a56fb04454
// Source SHA256: ed6f477f04b43f41fc51cbc753947560d39edc7520864fb72959a7b856595f47
//
`define CHDR_WIDTH 64