fpga: x400: Add makefiles for RF testbenches

Original-commit: 319d8c6411f62a2150b21b38bfe5fd55366ee700
This commit is contained in:
Wade Fife
2021-06-17 08:16:59 -05:00
parent bdc67122b8
commit 162632e7c1
7 changed files with 212 additions and 3 deletions
+3 -3
View File
@@ -1,6 +1,5 @@
# This file contains all testbenches to exlcude from the filter
# list discovered by run_testbenches.py
# NOTE: Lines containing "#" are treated as a comment
# This file contains all testbenches to exlcude from the filter list discovered
# by run_testbenches.py with the Vivado simulator (xsim).
top/e31x/sim/dram_test
top/n3xx/sim/arm_to_sfp_loopback
@@ -15,3 +14,4 @@ lib/axi4s_sv/axi4s_add_bytes_tb
lib/rfnoc/xport_sv/eth_interface_tb
top/x400/sim/x4xx_qsfp_wrapper
top/x400/ip/eth_100g_bd/lbus_tb
top/x400/rf/sim