fpga/usrp3: Fix DC truncation bias by adding rounding to DDC chain.
A digital DC bias caused by various truncations in the DDC chain was previously noticable with small signal levels, especially with high decimation rates. This patch eliminates the bias by replacing the truncation with rounding or simply keeping more bits for longer where it makes sense. This is essentially a forward port of a similar prior fix to the usrp2 DDC chain: https://github.com/EttusResearch/fpga/pull/4. Signed-off-by: Ryan Volz <ryan.volz@gmail.com> Original-commit: a57c162a0d11ab82a83c911a94272ceb6f7ff70a
This commit is contained in:
committed by
Joerg Hofrichter
parent
523212fa04
commit
1451ae066b
+14
-2
@@ -110,13 +110,25 @@ module small_hb_dec
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localparam ACCWIDTH = 30;
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reg [ACCWIDTH-1:0] accum;
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wire [ACCWIDTH-1:0] prod_acc_rnd;
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round #(
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.bits_in (36),
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.bits_out (ACCWIDTH),
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.round_to_zero (1),
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.round_to_nearest(0),
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.trunc (0)
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) round_prod (
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.in(prod),
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.out(prod_acc_rnd)
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);
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always @(posedge clk)
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if(rst)
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accum <= 0;
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else if(go_d2)
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accum <= {middle_d1[17],middle_d1[17],middle_d1,{(16+ACCWIDTH-36){1'b0}}} + {prod[35:36-ACCWIDTH]};
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accum <= {middle_d1[17],middle_d1[17],middle_d1,{(16+ACCWIDTH-36){1'b0}}} + prod_acc_rnd;
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else if(go_d3)
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accum <= accum + {prod[35:36-ACCWIDTH]};
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accum <= accum + prod_acc_rnd;
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wire [WIDTH:0] accum_rnd;
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wire [WIDTH-1:0] accum_rnd_clip;
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