fpga: x400: Add SPI Controller Info register

Include a register that contains SPI controller information.
Currently, it only provides the number of slaves addressable
by the SPI engine.


Original-commit: 1d7d1226e7576bfad484109afd3aad4e78af111b

top/x400/x4xx_gpio_spi.v

@@ -228,6 +228,10 @@ module x4xx_gpio_spi #(
             s_ctrlport_resp_data[SPI_RESPONSE_MSB:SPI_RESPONSE] <= readback[SPI_RESPONSE_MSB:SPI_RESPONSE];
           end
 
+          BASE_ADDRESS + CONTROLLER_INFO: begin
+            s_ctrlport_resp_data[SLAVE_COUNT_MSB:SLAVE_COUNT] <= NUM_SLAVES;
+          end
+
           // No register implementation for provided address
           default: begin
             // Acknowledge and provide error status if address is in range
@@ -534,6 +538,14 @@ endmodule
 //        <info> Records the response of the last completed SPI transaction. </info>
 //      </bitfield>
 //    </register>
+//    <register name="CONTROLLER_INFO" offset="0x1C" size="32" writable="false">
+//      <info>
+//        Contains information pertaining this SPI controller block.
+//      </info>
+//      <bitfield name="SLAVE_COUNT"     range="3..0">
+//        <info> Indicates the number SPI slaves configurable by the controller. </info>
+//      </bitfield>
+//    </register>
 //  </group>
 //</regmap>
 //XmlParse xml_off