This website requires JavaScript.
Explore
Help
Sign In
miegl
/
b210-k7-fpga
Watch
1
Star
0
Fork
0
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
Files
fd87d4cf305c1e2f7a4c16b5f4cbccb5e136eab5
b210-k7-fpga
/
top
/
e31x
/
ip
T
History
Sam O'Brien
0bb7d1dd93
fpga: e31x: Upgrade to Vivado 2021.1
...
Original-commit: 77f921c7c5d06095af5eb86a209348251edef07d
2022-08-25 13:55:30 -05:00
..
axi_inter_2x64_128_bd
fpga: e31x: Upgrade to Vivado 2021.1
2022-08-25 13:55:30 -05:00
ddr3_16bit
fpga: Update makefiles to allow parallel FPGA builds
2022-08-16 10:16:22 -05:00
e31x_ps_bd
fpga: e31x: Upgrade to Vivado 2021.1
2022-08-25 13:55:30 -05:00
fifo_4k_2clk
fpga: e31x: Upgrade to Vivado 2021.1
2022-08-25 13:55:30 -05:00
fifo_short_2clk
fpga: e31x: Upgrade to Vivado 2021.1
2022-08-25 13:55:30 -05:00
.gitignore
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
Makefile.inc
fpga: e31x: Add DRAM support
2022-02-10 18:13:44 -07:00
