Files
b210-k7-fpga/lib/control/Makefile.srcs
T
Ben Hilburn fbbc991a7d Pushing the bulk of UHD-3.7.0 code.
Original-commit: ff1546f8137f7f92bb250f685561b0c34cc0e053
2014-02-14 12:05:07 -08:00

29 lines
590 B
Makefile

#
# Copyright 2013 Ettus Research LLC
#
##################################################
# Control Lib Sources
##################################################
CONTROL_LIB_SRCS = $(abspath $(addprefix $(BASE_DIR)/../lib/control/, \
reset_sync.v \
por_gen.v \
gpio_atr.v \
simple_spi_core.v \
simple_i2c_core.v \
setting_reg.v \
settings_bus_crossclock.v \
radio_ctrl_proc.v \
ram_2port.v \
axi_crossbar.v \
axi_slave_mux.v \
axi_fifo_header.v \
arb_qualify_master.v \
axi_forwarding_cam.v \
axi_test_vfifo.v \
dram_2port.v \
cvita_uart.v \
serial_to_settings.v \
filter_bad_sid.v \
))