Wade Fife b4fed123c8 fpga: rfnoc: Add 4 KiB boundary check to sim_axi_ram ...

Adding a check for bursts that cross the 4 KiB boundary to the AXI4
memory model. Crossing a 4 KiB boundary is not allowed by AXI4.


Original-commit: 24f8bb39fd2769ff93d11b21152a834500152de4

2020-08-04 15:40:08 -05:00

..

axi_ram_fifo_bist_regs.v

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

axi_ram_fifo_bist.v

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

axi_ram_fifo_regs.v

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

axi_ram_fifo_regs.vh

rfnoc: Fix FIR and AXI RAM block register documentation

2020-03-05 13:49:38 -06:00

axi_ram_fifo.v

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

Makefile

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

Makefile.srcs

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

noc_shell_axi_ram_fifo.v

rfnoc: Update blocks to use autogenerated noc_shell

2020-02-06 14:50:33 -06:00

rfnoc_block_axi_ram_fifo_all_tb.sv

Merge FPGA repository back into UHD repository

2020-01-28 09:35:36 -08:00

rfnoc_block_axi_ram_fifo_tb.sv

fpga: rfnoc: Fix read suppression test in rfnoc_block_axi_ram_fifo_tb

2020-06-25 14:44:04 -05:00

rfnoc_block_axi_ram_fifo.v

fpga: rfnoc: Clean up ctrlport_splitter usage

2020-05-12 13:46:28 -05:00

sim_axi_ram.sv

fpga: rfnoc: Add 4 KiB boundary check to sim_axi_ram

2020-08-04 15:40:08 -05:00