33 lines
1.4 KiB
Makefile
33 lines
1.4 KiB
Makefile
#
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# Copyright 2015 Ettus Research
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#
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include $(TOOLS_DIR)/make/viv_ip_builder.mak
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IP_MIG_7SERIES_0_SRCS = $(IP_BUILD_DIR)/mig_7series_0/mig_7series_0.xci
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IP_MIG_7SERIES_0_OUTS = $(addprefix $(IP_BUILD_DIR)/mig_7series_0/, \
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mig_7series_0.xci.out \
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mig_7series_0/user_design/rtl/mig_7series_0.v \
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mig_7series_0/user_design/rtl/mig_7series_0_mig.v \
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)
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IP_MIG_7SERIES_TG_SRCS = $(addprefix $(IP_BUILD_DIR)/mig_7series_0/, \
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mig_7series_0/example_design/rtl/example_top.v \
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mig_7series_0/example_design/rtl/traffic_gen/mig_7series_v4_2_axi4_tg.v \
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mig_7series_0/example_design/rtl/traffic_gen/mig_7series_v4_2_axi4_wrapper.v \
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mig_7series_0/example_design/rtl/traffic_gen/mig_7series_v4_2_cmd_prbs_gen_axi.v \
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mig_7series_0/example_design/rtl/traffic_gen/mig_7series_v4_2_data_gen_chk.v \
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mig_7series_0/example_design/rtl/traffic_gen/mig_7series_v4_2_tg.v \
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)
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IP_MIG_7SERIES_0_SIM_OUTS = $(addprefix $(IP_BUILD_DIR)/mig_7series_0/, \
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mig_7series_0/example_design/sim/ddr3_model.sv \
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mig_7series_0/example_design/sim/ddr3_model_parameters.vh \
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)
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$(IP_MIG_7SERIES_0_SRCS) $(IP_MIG_7SERIES_0_OUTS) : $(IP_DIR)/mig_7series_0/mig_7series_0.xci $(IP_DIR)/mig_7series_0/mig_*.prj
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cp -f $(IP_DIR)/mig_7series_0/mig_$(subst /,,$(PART_ID)).prj $(IP_DIR)/mig_7series_0/mig_a.prj # Note: This won't allow parallel IP builds
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$(call BUILD_VIVADO_IP,mig_7series_0,$(ARCH),$(PART_ID),$(IP_DIR),$(IP_BUILD_DIR),0)
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rm -f $(IP_DIR)/mig_7series_0/mig_a.prj
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