Humberto Jimenez
4082066a6f
This commit refactors the X410's CPLDs build process to make it similar to other FPGA targets within the repo. The new process relies on basic Quartus build utilities. Additionally, this commit adds support for an alternative MAX10 CPLD for the motherboard CPLD implementation. Both previous (10M04) and new variant (10M08) are supported concurrently. The images package mapping is updated to reflect these changes. Original-commit: e1ce4565dbc7336ee806adce7c087bda4fcc77ae
102 lines
3.4 KiB
Makefile
102 lines
3.4 KiB
Makefile
#
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# Copyright 2021 Ettus Research, a National Instruments Brand
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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# NOTE: All comments prefixed with a "##" will be displayed as a part of the "make help" target
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##-------------------
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##USRP ZBX CPLD Help
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##-------------------
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##Usage:
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## make <Targets> <Options>
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##
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##Output:
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## build/<device-id>/usrp_zbx_cpld.pof: Bitstream to use with JTAG programmer
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## build/<device-id>/usrp_zbx_cpld.svf: Bitstream to use with PS JTAG engine (background programming)
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## build/<device-id>/usrp_zbx_cpld.rpd: Bitstream to use via reconfig engine
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## build/<device-id>/usrp_zbx_cpld_isp_off.svf: Bitstream to use with JTAG test points (initial programming)
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# Definitions
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10M04_ID = "10M04SAU324I7G"
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# Target specific variables
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ZBX_CPLD_10M04: DEFS = VARIANT_`echo $(10M04_ID) | cut -c1-5`=1
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# Using one of the files as a dependency (all files are generated at the same time)
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INIT_FILES := register_endpoints/memory_init_files/rx0_path_defaults.hex
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TARGET = bin
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TOP ?= zbx_top_cpld
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# pre_build()
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pre_build = @\
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mkdir -p build-$@/register_endpoints/memory_init_files/; \
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cp -rf register_endpoints/memory_init_files/*.hex build-$@/register_endpoints/memory_init_files/
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# quartus_build($1=Device, $2=Definitions)
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quartus_build = make -f Makefile.zbx_cpld.inc $(TARGET) NAME=$@ ARCH="MAX10" PART_ID="$1" $2 TOP_MODULE=$(TOP) EXTRA_DEFS="$2" POST_STA_TCL="ps_cs_analysis.tcl"
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# quartus_ip($1=Device, $2=Definitions)
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quartus_ip = make -f Makefile.zbx_cpld.inc quar_ip NAME=$@ ARCH="MAX10" PART_ID="$1" $2 TOP_MODULE=$(TOP) EXTRA_DEFS="$2"
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# post_build($1=Artifact Name)
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ifeq ($(TARGET),bin)
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post_build = @\
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mkdir -p build/; \
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echo "Exporting bitstream files..."; \
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cp build-$@/output_files/$(TOP).pof build/$(1).pof; \
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cp build-$@/output_files/$(TOP)_isp_off.svf build/$(1)_isp_off.svf; \
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cp build-$@/output_files/$(TOP)_isp_on.svf build/$(1).svf; \
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cp build-$@/output_files/$(TOP)_converted_cfm0_auto.rpd build/$(1).rpd; \
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echo -ne "\n\n---- Make: MB CPLD ready!\n"; \
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echo -ne " Use build/$(1).pof via JTAG programmer or\n"; \
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echo -ne " build/$(1).svf (ISP on) via PS JTAG-engine (background programming) or\n"; \
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echo -ne " build/$(1).rpd via reconfig engine or\n"; \
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echo -ne " build/$(1)_isp_off.svf via JTAG test points (initial programming)\n";
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else
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post_build = @echo "Skipping bitfile export."
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endif
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##
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##Supported Targets
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##-----------------
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all: ZBX_CPLD_10M04 ##(Default target)
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##ZBX_CPLD_10M04: ZBX CPLD targeted to 10M04SAU169I7G.
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ZBX_CPLD_10M04: $(INIT_FILES)
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$(call pre_build)
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$(call quartus_build,$(10M04_ID),$(DEFS))
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$(call post_build,"usrp_zbx_cpld")
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ZBX_CPLD_IP: ##Build IPs only, needed for simulation.
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@# Building only ZBX_CPLD_10M04 IP
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$(call quartus_ip,$(10M04_ID),$(DEFS))
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$(INIT_FILES):
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make -f Makefile.zbx_cpld.inc cpld_defaults
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clean: ##Clean up all target build outputs.
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@echo -ne "\nCleaning targets and git repo...\n";
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@rm -rf build-ZBX_CPLD*
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@rm -rf build
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@git clean -Xdf
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cleanall: ##Clean up all target and ip build outputs.
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@echo -ne "\nCleaning targets, IP, and git repo...\n";
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@rm -rf build-ZBX_CPLD*
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@rm -rf build
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@rm -rf build-ip
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@git clean -Xdf
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help: ##Show this help message.
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@grep -h "##" Makefile | grep -v "\"##\"" | sed -e 's/\\$$//' | sed -e 's/##//'
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##
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##Supported Options
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##-----------------
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##
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.PHONY: all build clean ip
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