7e59e9516d
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com> Original-commit: 7015f5ed2d495f3908773b7c7d74864d0cc3871a
91 lines
4.1 KiB
XML
91 lines
4.1 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<system name="$${FILENAME}">
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<component
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name="$${FILENAME}"
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displayName="$${FILENAME}"
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version="1.0"
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description=""
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tags="INTERNAL_COMPONENT=true"
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categories="System" />
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<parameter name="bonusData"><![CDATA[bonusData
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{
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element onchip_flash_0
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{
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datum _sortIndex
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{
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value = "0";
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type = "int";
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}
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}
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}
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]]></parameter>
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<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
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<parameter name="device" value="10M04SAU169I7G" />
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<parameter name="deviceFamily" value="MAX 10" />
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<parameter name="deviceSpeedGrade" value="7" />
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<parameter name="fabricMode" value="QSYS" />
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<parameter name="generateLegacySim" value="false" />
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<parameter name="generationId" value="0" />
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<parameter name="globalResetBus" value="false" />
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<parameter name="hdlLanguage" value="VERILOG" />
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<parameter name="hideFromIPCatalog" value="true" />
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<parameter name="lockedInterfaceDefinition" value="" />
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<parameter name="maxAdditionalLatency" value="1" />
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<parameter name="projectName" value="" />
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<parameter name="sopcBorderPoints" value="false" />
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<parameter name="systemHash" value="0" />
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<parameter name="testBenchDutName" value="" />
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<parameter name="timeStamp" value="0" />
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<parameter name="useTestBenchNamingPattern" value="false" />
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<instanceScript></instanceScript>
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<interface name="clk" internal="onchip_flash_0.clk" type="clock" dir="end">
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<port name="clock" internal="clock" />
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</interface>
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<interface name="csr" internal="onchip_flash_0.csr" type="avalon" dir="end">
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<port name="avmm_csr_addr" internal="avmm_csr_addr" />
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<port name="avmm_csr_read" internal="avmm_csr_read" />
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<port name="avmm_csr_writedata" internal="avmm_csr_writedata" />
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<port name="avmm_csr_write" internal="avmm_csr_write" />
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<port name="avmm_csr_readdata" internal="avmm_csr_readdata" />
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</interface>
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<interface name="data" internal="onchip_flash_0.data" type="avalon" dir="end">
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<port name="avmm_data_addr" internal="avmm_data_addr" />
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<port name="avmm_data_read" internal="avmm_data_read" />
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<port name="avmm_data_writedata" internal="avmm_data_writedata" />
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<port name="avmm_data_write" internal="avmm_data_write" />
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<port name="avmm_data_readdata" internal="avmm_data_readdata" />
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<port name="avmm_data_waitrequest" internal="avmm_data_waitrequest" />
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<port name="avmm_data_readdatavalid" internal="avmm_data_readdatavalid" />
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<port name="avmm_data_burstcount" internal="avmm_data_burstcount" />
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</interface>
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<interface name="nreset" internal="onchip_flash_0.nreset" type="reset" dir="end">
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<port name="reset_n" internal="reset_n" />
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</interface>
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<module
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name="onchip_flash_0"
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kind="altera_onchip_flash"
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version="18.1"
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enabled="1"
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autoexport="1">
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<parameter name="AUTO_CLOCK_RATE" value="0" />
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<parameter name="CLOCK_FREQUENCY" value="50.0" />
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<parameter name="CONFIGURATION_MODE">Single Compressed Image</parameter>
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<parameter name="CONFIGURATION_SCHEME">Internal Configuration</parameter>
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<parameter name="DATA_INTERFACE" value="Parallel" />
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<parameter name="DEVICE_FAMILY" value="MAX 10" />
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<parameter name="PART_NAME" value="10M04SAU169I7G" />
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<parameter name="READ_BURST_COUNT" value="8" />
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<parameter name="READ_BURST_MODE" value="Incrementing" />
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<parameter name="SECTOR_ACCESS_MODE">Read and write,Read and write,Read and write,Read and write,Read and write</parameter>
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<parameter name="autoInitializationFileName">$${FILENAME}_onchip_flash_0</parameter>
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<parameter name="initFlashContent" value="false" />
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<parameter name="initializationFileName">altera_onchip_flash.hex</parameter>
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<parameter name="initializationFileNameForSim">altera_onchip_flash.dat</parameter>
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<parameter name="useNonDefaultInitFile" value="false" />
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</module>
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<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
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<interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
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<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
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<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
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</system>
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