Change the width of the crossbar in the AXI Interconnect IP from 256-bit to 512-bit to match the DRAM memory controller width and to give better performance. Original-commit: 822cd03c8cd686f8b0554774adcbdd3803128bc2
Change the width of the crossbar in the AXI Interconnect IP from 256-bit to 512-bit to match the DRAM memory controller width and to give better performance. Original-commit: 822cd03c8cd686f8b0554774adcbdd3803128bc2