Wade Fife
61ee0ddec3
This updates all RFNoC devices so that they get the RFNoC protocol version and CHDR width in the same way, from the output generated by the RFNoC image builder. Original-commit: 6f038dc2f69b38e715206b2e700fdd3a1bbc638e
198 lines
7.7 KiB
Makefile
198 lines
7.7 KiB
Makefile
#
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# Copyright 2016-2018 Ettus Research, a National Instruments Company
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# Copyright 2019 Ettus Research, a National Instruments Brand
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#
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# NOTE: All comments prefixed with a "##" will be displayed as a part of the "make help" target
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##-------------------
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##USRP N3XX FPGA Help
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##-------------------
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##Usage:
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## make <Targets> <Options>
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##
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##Output:
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## build/usrp_<product>_fpga_<image_type>.bit: Configuration bitstream with header
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## build/usrp_<product>_fpga_<image_type>.dts: Device tree source file
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## build/usrp_<product>_fpga_<image_type>.rpt: Build report (includes utilization and timing summary)
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# Debug Options
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# Uncomment this line or add to make arg to omit radio_clk (sourced from db) and use bus_clk as radio_clk
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# OPTIONS += NO_DB=1
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# Uncomment this line to add two example Aurora loopback lanes on the general NPIO bus.
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# OPTIONS += NPIO_LANES=2
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# Uncomment this line to add four example Aurora loopback lanes on the QSFP NPIO bus.
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# OPTIONS += QSFP_LANES=4
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# Additional definitions specific to the various targets:
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WX_DEFS=SFP0_WR=1 SFP1_10GBE=1 USE_REPLAY=1 BUILD_WR=1 BUILD_10G=1 $(OPTIONS)
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HG_DEFS=SFP0_1GBE=1 SFP1_10GBE=1 USE_REPLAY=1 BUILD_1G=1 BUILD_10G=1 $(OPTIONS)
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XG_DEFS=SFP0_10GBE=1 SFP1_10GBE=1 USE_REPLAY=1 BUILD_10G=1 $(OPTIONS)
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HA_DEFS=SFP0_1GBE=1 SFP1_AURORA=1 USE_REPLAY=1 BUILD_1G=1 BUILD_AURORA=1 $(OPTIONS)
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XA_DEFS=SFP0_10GBE=1 SFP1_AURORA=1 USE_REPLAY=1 BUILD_10G=1 BUILD_AURORA=1 $(OPTIONS)
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AA_DEFS=SFP0_AURORA=1 SFP1_AURORA=1 BUILD_AURORA=1 $(OPTIONS)
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XQ_DEFS=SFP0_WR=1 QSFP_10GBE=1 USE_REPLAY=1 BUILD_WR=1 BUILD_10G=1 QSFP_LANES=2 $(OPTIONS)
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AQ_DEFS=SFP0_10GBE=1 SFP1_10GBE=1 QSFP_AURORA=1 USE_REPLAY=1 BUILD_10G=1 BUILD_AURORA=1 QSFP_LANES=4 $(OPTIONS)
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# Defaults specific to the various targets:
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N300_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=$(abspath n300_rfnoc_image_core.v) DEFAULT_EDGE_FILE=$(abspath n300_static_router.hex)
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N310_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=$(abspath n310_rfnoc_image_core.v) DEFAULT_EDGE_FILE=$(abspath n310_static_router.hex)
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N320_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=$(abspath n320_rfnoc_image_core.v) DEFAULT_EDGE_FILE=$(abspath n320_static_router.hex)
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N300AA_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=$(abspath n300_bist_image_core.v) DEFAULT_EDGE_FILE=$(abspath n300_bist_static_router.hex)
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N310AA_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=$(abspath n310_bist_image_core.v) DEFAULT_EDGE_FILE=$(abspath n310_bist_static_router.hex)
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N320AA_DEFAULTS:=DEFAULT_RFNOC_IMAGE_CORE_FILE=$(abspath n320_bist_image_core.v) DEFAULT_EDGE_FILE=$(abspath n320_bist_static_router.hex)
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# Set build option (check RTL, run synthesis, or do a full build)
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ifndef TARGET
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ifdef CHECK
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TARGET = rtl
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else ifdef SYNTH
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TARGET = synth
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else
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TARGET = bin
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endif
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endif
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TOP ?= n3xx
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# vivado_build($1=Device, $2=Definitions, $3=Defaults)
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# Device: N300, N310, or N320
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# Definitions: See above (*_DEFS)
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# Defaults: See above (*_DEFAULTS)
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vivado_build = make -f Makefile.n3xx.inc $(TARGET) NAME=$@ ARCH=$(XIL_ARCH_$1) PART_ID=$(XIL_PART_ID_$1) $2 TOP_MODULE=$(TOP) EXTRA_DEFS="$2" $3
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# post_build($1=Device, $2=Option)
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ifeq ($(TARGET),bin)
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post_build = @\
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mkdir -p build; \
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echo "Exporting bitstream file..."; \
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cp build-$(1)_$(2)/n3xx.bit build/usrp_`echo $(1) | tr A-Z a-z`_fpga_$(2).bit; \
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echo "Exporting build report..."; \
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cp build-$(1)_$(2)/build.rpt build/usrp_`echo $(1) | tr A-Z a-z`_fpga_$(2).rpt; \
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echo "Build DONE ... $(1)_$(2)";
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else
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post_build = @echo "Skipping bitfile export."
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endif
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##
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##Supported Targets
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##-----------------
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all: N300_HG N300_XG N310_HG N310_XG N320_HG N320_XG ##(Default target)
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##N310_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1.
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N310_WX: build/usrp_n310_fpga_WX.dts
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$(call vivado_build,N310,$(WX_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,WX)
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##N310_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N310_HG: build/usrp_n310_fpga_HG.dts
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$(call vivado_build,N310,$(HG_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,HG)
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##N310_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N310_XG: build/usrp_n310_fpga_XG.dts
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$(call vivado_build,N310,$(XG_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,XG)
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##N310_HA: 1Gig on SFP+ Port0, Aurora on SFP+ Port1.
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N310_HA: build/usrp_n310_fpga_HA.dts
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$(call vivado_build,N310,$(HA_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,HA)
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##N310_XA: 10Gig on SFP+ Port0, Aurora on SFP+ Port1.
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N310_XA: build/usrp_n310_fpga_XA.dts
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$(call vivado_build,N310,$(XA_DEFS) N310=1,$(N310_DEFAULTS))
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$(call post_build,N310,XA)
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##N310_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1.
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N310_AA: build/usrp_n310_fpga_AA.dts
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$(call vivado_build,N310,$(AA_DEFS) N310=1,$(N310AA_DEFAULTS))
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$(call post_build,N310,AA)
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##N300_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1.
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N300_WX: build/usrp_n300_fpga_WX.dts
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$(call vivado_build,N300,$(WX_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,WX)
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##N300_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N300_HG: build/usrp_n300_fpga_HG.dts
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$(call vivado_build,N300,$(HG_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,HG)
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##N300_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N300_XG: build/usrp_n300_fpga_XG.dts
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$(call vivado_build,N300,$(XG_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,XG)
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##N300_HA: 1Gig on SFP+ Port0, Aurora on SFP+ Port1.
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N300_HA: build/usrp_n300_fpga_HA.dts
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$(call vivado_build,N300,$(HA_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,HA)
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##N300_XA: 10Gig on SFP+ Port0, Aurora on SFP+ Port1.
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N300_XA: build/usrp_n300_fpga_XA.dts
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$(call vivado_build,N300,$(XA_DEFS) N300=1,$(N300_DEFAULTS))
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$(call post_build,N300,XA)
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##N300_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1.
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N300_AA: build/usrp_n300_fpga_AA.dts
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$(call vivado_build,N300,$(AA_DEFS) N300=1,$(N300AA_DEFAULTS))
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$(call post_build,N300,AA)
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##N320_WX: 1GigE White Rabbit on SFP+ Port0, 10Gig on SFP+ Port1.
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N320_WX: build/usrp_n320_fpga_WX.dts
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$(call vivado_build,N320,$(WX_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,WX)
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##N320_HG: 1GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N320_HG: build/usrp_n320_fpga_HG.dts
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$(call vivado_build,N320,$(HG_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,HG)
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##N320_XG: 10GigE on SFP+ Port0, 10Gig on SFP+ Port1.
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N320_XG: build/usrp_n320_fpga_XG.dts
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$(call vivado_build,N320,$(XG_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,XG)
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##N320_XQ: WR on SFP+ Port0, 10Gig on QSFP+ Port0,1.
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N320_XQ: build/usrp_n320_fpga_XQ.dts
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$(call vivado_build,N320,$(XQ_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,XQ)
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##N320_AQ: 10Gig on SFP+ Port0,1 Aurora on QSFP+ Port0,1,2,3.
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N320_AQ: build/usrp_n320_fpga_AQ.dts
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$(call vivado_build,N320,$(AQ_DEFS) N320=1,$(N320_DEFAULTS))
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$(call post_build,N320,AQ)
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##N320_AA: Aurora on SFP+ Port0, Aurora on SFP+ Port1.
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N320_AA: build/usrp_n320_fpga_AA.dts
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$(call vivado_build,N320,$(AA_DEFS) N320=1,$(N320AA_DEFAULTS))
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$(call post_build,N320,AA)
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build/%.dts: dts/%.dts dts/*.dtsi
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-mkdir -p build
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${CC} -o $@ -E -I dts -nostdinc -undef -x assembler-with-cpp -D__DTS__ $<
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clean: ##Clean up all target build outputs.
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@echo "Cleaning targets..."
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@rm -rf build-N3*_*
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@rm -rf build
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cleanall: ##Clean up all target and ip build outputs.
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@echo "Cleaning targets and IP..."
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@rm -rf build-ip
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@rm -rf build-N3*_*
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@rm -rf build
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help: ##Show this help message.
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@grep -h "##" Makefile | grep -v "\"##\"" | sed -e 's/\\$$//' | sed -e 's/##//'
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##
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##Supported Options
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##-----------------
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##GUI=1 Launch the build in the Vivado GUI.
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##CHECK=1 Launch the syntax checker instead of building a bitfile.
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##SYNTH=1 Launch the build but stop after synthesis.
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##TOP=<module> Specify a top module for syntax checking. (Optional. Default is the bitfile top)
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.PHONY: all clean cleanall help
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