miegl/b210-k7-fpga
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
Files
b4fed123c8c28dc35a82d0e34f7a01fe1249ed38
b210-k7-fpga/top/n3xx
T
History
steviez 3bbc81bb44 fpga: n320: Add BIST (AA) image files 
This adds new image files which come with a DRAM FIFO. The addition of
an N320 image with a DRAM FIFO allows DDR3 BIST to be run on an
assembled (motherboard + daughterboard) N320.

This image is intentionally very similar to the N300_AA and N310_AA
targets which serve the same purpose of providing an image with a DRAM
FIFO for their respective devices.


Original-commit: ae2b9bf7aeea6f8f98f6dacffdfc018d87107927
2020-07-31 14:32:54 -05:00
..
coregen_dsp
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
dboards
n32x: Swap out liberio for internal Ethernet
2020-07-16 10:00:12 -05:00
doc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
dts
fpga: n320: Add BIST (AA) image files
2020-07-31 14:32:54 -05:00
ip
n3xx: Swap out liberio for internal Ethernet
2020-07-16 10:00:12 -05:00
sim
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
.gitignore
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
build_n3xx.tcl
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
dev_config.json
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
Makefile
fpga: n320: Add BIST (AA) image files
2020-07-31 14:32:54 -05:00
Makefile.n3xx.inc
fpga: Update RFNOC_EDGE_TBL_FILE for Cygwin
2020-06-12 15:50:16 -05:00
mb_clocks.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
mb_pins.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
mb_timing.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n3xx_clocking.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n3xx_core.v
fpga, mpm: Bump FPGA compat number
2020-07-24 15:24:14 -05:00
n3xx_db_fe_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n3xx_mgt_channel_wrapper.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n3xx_mgt_io_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n3xx_mgt_wrapper.v
fpga: n3xx: Fix White Rabbit images
2020-07-01 15:49:13 -05:00
n3xx_serial_dac_arb.vhd
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n3xx_serial_dac.vhd
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n3xx_wr_top.vhd
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n3xx_wr.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n300_bist_image_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n300_bist_image_core.yml
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n300_bist_static_router.hex
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n300_rfnoc_image_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n300_rfnoc_image_core.yml
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n300_static_router.hex
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_1ge.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_10ge.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_aurora.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_bist_image_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_bist_image_core.yml
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_bist_static_router.hex
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_dram.xdc
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_rfnoc_image_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_rfnoc_image_core.yml
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n310_static_router.hex
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n320_bist_image_core.v
fpga: n320: Add BIST (AA) image files
2020-07-31 14:32:54 -05:00
n320_bist_image_core.yml
fpga: n320: Add BIST (AA) image files
2020-07-31 14:32:54 -05:00
n320_bist_static_router.hex
fpga: n320: Add BIST (AA) image files
2020-07-31 14:32:54 -05:00
n320_rfnoc_image_core.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n320_rfnoc_image_core.yml
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
n320_static_router.hex
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
setupenv.sh
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
WrapBufg.vhd
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00