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b210-k7-fpga/lib/rfnoc/core
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Wade Fife 59f5dcfc4f fpga: rfnoc: Add support for CHDR_W < ITEM_W*NIPC 
This change fixes the case where CHDR_W < ITEM_W*NIPC.

It also adds a state machine to stall the input to the pyld_fifo to
ensure that the pkt_info_fifo will not overflow. Previously in some
cases it allowed the same word to be inserted into the pyld_fifo
multiple times.


Original-commit: b862eda69cf41c7044a1805324f2fcfef5b0ba3d
2020-08-04 15:40:08 -05:00
..
axis_ctrl_endpoint.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
axis_ctrl_master.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
axis_ctrl_slave.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
axis_data_mdata_to_chdr.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
axis_data_to_chdr.v
fpga: rfnoc: Add support for CHDR_W < ITEM_W*NIPC
2020-08-04 15:40:08 -05:00
axis_pyld_ctxt_to_chdr.v
fpga: Change default MTU to 10
2020-05-11 09:06:03 -05:00
backend_iface.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
chdr_compute_tkeep.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
chdr_data_swapper.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
chdr_ingress_fifo.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
chdr_mgmt_pkt_handler.v
fpga: lib: Fix chdr_mgmt_pkt_handler when CHDR_W != 64
2020-07-30 15:28:35 -05:00
chdr_stream_endpoint.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
chdr_stream_input.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
chdr_stream_output.v
fpga: rfnoc: Add support for 512-bit CHDR widths
2020-06-18 09:09:34 -05:00
chdr_to_axis_ctrl.v
fpga: rfnoc: Add support for 512-bit CHDR widths
2020-06-18 09:09:34 -05:00
chdr_to_axis_data_mdata.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
chdr_to_axis_data.v
fpga: rfnoc: Add support for CHDR_W < ITEM_W*NIPC
2020-08-04 15:40:08 -05:00
chdr_to_axis_pyld_ctxt.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
chdr_to_chdr_data.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
ctrlport_endpoint.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
ctrlport.vh
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
Makefile.srcs
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
rfnoc_axis_ctrl_utils.vh
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
rfnoc_backend_iface.vh
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
rfnoc_chdr_internal_utils.vh
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00
rfnoc_chdr_utils.vh
fpga: rfnoc: Fix chdr_update_length function
2020-06-29 14:03:17 -05:00
rfnoc_core_kernel.v
Merge FPGA repository back into UHD repository
2020-01-28 09:35:36 -08:00