Files
b210-k7-fpga/top/b200/coregen_dsp/hbdec2.asy
T
+18 6b67702ad7 Merge FPGA repository back into UHD repository
The FPGA codebase was removed from the UHD repository in 2014 to reduce
the size of the repository. However, over the last half-decade, the
split between the repositories has proven more burdensome than it has
been helpful. By merging the FPGA code back, it will be possible to
create atomic commits that touch both FPGA and UHD codebases. Continuous
integration testing is also simplified by merging the repositories,
because it was previously difficult to automatically derive the correct
UHD branch when testing a feature branch on the FPGA repository.

This commit also updates the license files and paths therein.

We are therefore merging the repositories again. Future development for
FPGA code will happen in the same repository as the UHD host code and
MPM code.

== Original Codebase and Rebasing ==

The original FPGA repository will be hosted for the foreseeable future
at its original local location: https://github.com/EttusResearch/fpga/

It can be used for bisecting, reference, and a more detailed history.

The final commit from said repository to be merged here is
05003794e2da61cabf64dd278c45685a7abad7ec. This commit is tagged as
v4.0.0.0-pre-uhd-merge.

If you have changes in the FPGA repository that you want to rebase onto
the UHD repository, simply run the following commands:

- Create a directory to store patches (this should be an empty
  directory):

    mkdir ~/patches

- Now make sure that your FPGA codebase is based on the same state as
  the code that was merged:

    cd src/fpga # Or wherever your FPGA code is stored
    git rebase v4.0.0.0-pre-uhd-merge

  Note: The rebase command may look slightly different depending on what
  exactly you're trying to rebase.

- Create a patch set for your changes versus v4.0.0.0-pre-uhd-merge:

    git format-patch v4.0.0.0-pre-uhd-merge -o ~/patches

  Note: Make sure that only patches are stored in your output directory.
  It should otherwise be empty. Make sure that you picked the correct
  range of commits, and only commits you wanted to rebase were exported
  as patch files.

- Go to the UHD repository and apply the patches:

    cd src/uhd # Or wherever your UHD repository is stored
    git am --directory fpga ~/patches/*
    rm -rf ~/patches # This is for cleanup

== Contributors ==

The following people have contributed mainly to these files (this list
is not complete):

Co-authored-by: Alex Williams <alex.williams@ni.com>
Co-authored-by: Andrej Rode <andrej.rode@ettus.com>
Co-authored-by: Ashish Chaudhari <ashish@ettus.com>
Co-authored-by: Ben Hilburn <ben.hilburn@ettus.com>
Co-authored-by: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
Co-authored-by: Daniel Jepson <daniel.jepson@ni.com>
Co-authored-by: Derek Kozel <derek.kozel@ettus.com>
Co-authored-by: EJ Kreinar <ej@he360.com>
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Ian Buckley <ian.buckley@gmail.com>
Co-authored-by: Jörg Hofrichter <joerg.hofrichter@ni.com>
Co-authored-by: Jon Kiser <jon.kiser@ni.com>
Co-authored-by: Josh Blum <josh@joshknows.com>
Co-authored-by: Jonathon Pendlum <jonathan.pendlum@ettus.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
Co-authored-by: Matt Ettus <matt@ettus.com>
Co-authored-by: Michael West <michael.west@ettus.com>
Co-authored-by: Moritz Fischer <moritz.fischer@ettus.com>
Co-authored-by: Nick Foster <nick@ettus.com>
Co-authored-by: Nicolas Cuervo <nicolas.cuervo@ettus.com>
Co-authored-by: Paul Butler <paul.butler@ni.com>
Co-authored-by: Paul David <paul.david@ettus.com>
Co-authored-by: Ryan Marlow <ryan.marlow@ettus.com>
Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
Co-authored-by: Sylvain Munaut <tnt@246tNt.com>
Co-authored-by: Trung Tran <trung.tran@ettus.com>
Co-authored-by: Vidush Vishwanath <vidush.vishwanath@ettus.com>
Co-authored-by: Wade Fife <wade.fife@ettus.com>


Original-commit: bafa9d95453387814ef25e6b6256ba8db2df612f
2020-01-28 09:35:36 -08:00

62 lines
1.3 KiB
Plaintext

Version 4
SymbolType BLOCK
TEXT 32 32 LEFT 4 hbdec2
RECTANGLE Normal 32 32 544 2048
LINE Normal 0 144 32 144
PIN 0 144 LEFT 36
PINATTR PinName nd
PINATTR Polarity IN
LINE Wide 0 240 32 240
PIN 0 240 LEFT 36
PINATTR PinName din_1[23:0]
PINATTR Polarity IN
LINE Wide 0 272 32 272
PIN 0 272 LEFT 36
PINATTR PinName din_2[23:0]
PINATTR Polarity IN
LINE Normal 0 848 32 848
PIN 0 848 LEFT 36
PINATTR PinName coef_ld
PINATTR Polarity IN
LINE Normal 0 880 32 880
PIN 0 880 LEFT 36
PINATTR PinName coef_we
PINATTR Polarity IN
LINE Wide 0 912 32 912
PIN 0 912 LEFT 36
PINATTR PinName coef_din[17:0]
PINATTR Polarity IN
LINE Normal 0 1008 32 1008
PIN 0 1008 LEFT 36
PINATTR PinName clk
PINATTR Polarity IN
LINE Normal 0 1040 32 1040
PIN 0 1040 LEFT 36
PINATTR PinName ce
PINATTR Polarity IN
LINE Normal 0 1072 32 1072
PIN 0 1072 LEFT 36
PINATTR PinName sclr
PINATTR Polarity IN
LINE Wide 576 240 544 240
PIN 576 240 RIGHT 36
PINATTR PinName dout_1[46:0]
PINATTR Polarity OUT
LINE Wide 576 272 544 272
PIN 576 272 RIGHT 36
PINATTR PinName dout_2[46:0]
PINATTR Polarity OUT
LINE Normal 576 1840 544 1840
PIN 576 1840 RIGHT 36
PINATTR PinName rfd
PINATTR Polarity OUT
LINE Normal 576 1872 544 1872
PIN 576 1872 RIGHT 36
PINATTR PinName rdy
PINATTR Polarity OUT
LINE Normal 576 1904 544 1904
PIN 576 1904 RIGHT 36
PINATTR PinName data_valid
PINATTR Polarity OUT