7e59e9516d
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com> Original-commit: 7015f5ed2d495f3908773b7c7d74864d0cc3871a
29 lines
1.2 KiB
Systemverilog
29 lines
1.2 KiB
Systemverilog
//
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// Copyright 2021 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: constants_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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//===============================================================================
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// RegTypes
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//===============================================================================
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//===============================================================================
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// Register Group CONSTANTS_GROUP
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//===============================================================================
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// Enumerated type CONSTANTS_ENUM
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localparam CONSTANTS_ENUM_SIZE = 4;
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localparam PS_CPLD_SIGNATURE = 'hA522D27; // CONSTANTS_ENUM:PS_CPLD_SIGNATURE
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localparam OLDEST_CPLD_REVISION = 'h20122114; // CONSTANTS_ENUM:OLDEST_CPLD_REVISION
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localparam CPLD_REVISION = 'h21012015; // CONSTANTS_ENUM:CPLD_REVISION
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localparam PL_CPLD_SIGNATURE = 'h3FDC5C47; // CONSTANTS_ENUM:PL_CPLD_SIGNATURE
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