7e59e9516d
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Co-authored-by: Javier Valenzuela <javier.valenzuela@ni.com> Original-commit: 7015f5ed2d495f3908773b7c7d74864d0cc3871a
78 lines
3.1 KiB
Makefile
78 lines
3.1 KiB
Makefile
#
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# Copyright 2021 Ettus Research, a National Instruments Brand
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#
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# SPDX-License-Identifier: LGPL-3.0-or-later
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#
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GIT_HASH = $(shell ../../../tools/scripts/git-hash.sh)
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build: ip
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@echo -ne "\n---- Make: Synthesis ...\n\n";
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@quartus_map mb_cpld --verilog_macro="GIT_HASH=32'h$(GIT_HASH)";
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@echo -ne "\n---- Make: Partition Merge ...\n\n";
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@quartus_cdb mb_cpld --merge=on --incremental_compilation_import
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@echo -ne "\n\n---- Make: Implementation ...\n\n";
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@quartus_fit mb_cpld;
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@echo -ne "\n\n---- Make: Analyzing timing ...\n\n";
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@quartus_sta mb_cpld;
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@# grep for unconstrained path warning
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@grep "332102" output_files/mb_cpld.sta.rpt; \
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if [ $$? -eq 0 ]; then false; else true; fi
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@# grep for timing closure critical warning
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@grep "332148" output_files/mb_cpld.sta.rpt; \
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if [ $$? -eq 0 ]; then false; else true; fi
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@# expect no warnings
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@grep -iw "warning" output_files/mb_cpld.sta.rpt; \
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if [ $$? -eq 0 ]; then false; else true; fi
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@# expect no critical warning except "review power analyzer report file"
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@grep -i "critical warning" output_files/* | grep -v 16562; \
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if [ $$? -eq 0 ]; then false; else true; fi
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@# PS chip select analysis
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@quartus_sta -t scripts/ps_cs_analysis.tcl
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@echo -ne "\n\n---- Make: Generating bitfile...\n\n";
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@quartus_asm mb_cpld;
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@echo -ne "\n\n---- Make: Converting bitfile to svf format (ISP enabled)...\n\n";
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@quartus_cpf --convert \
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--frequency 10.0MHz \
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--voltage 2.5 \
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--operation p \
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./output_files/mb_cpld.pof ./output_files/mb_cpld_isp_on.svf -o background_programming=on;
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@echo -ne "\n\n---- Make: Converting bitfile to svf format (ISP disabled)...\n\n";
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@quartus_cpf --convert \
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--frequency 10.0MHz \
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--voltage 2.5 \
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--operation p \
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./output_files/mb_cpld.pof ./output_files/mb_cpld_isp_off.svf;
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@echo -ne "\n\n---- Make: Converting bitfile to rdp format...\n\n";
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@quartus_cpf -c raw_conversion.cof
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@echo -ne "\n\n---- Make: Copy final files...\n\n";
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@mkdir -p build
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@cp output_files/mb_cpld.pof build/usrp_x410_cpld.pof
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@cp output_files/mb_cpld_isp_off.svf build/usrp_x410_cpld_isp_off.svf
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@cp output_files/mb_cpld_isp_on.svf build/usrp_x410_cpld.svf
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@cp output_files/mb_cpld_converted_cfm0_auto.rpd build/usrp_x410_cpld.rpd
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@echo -ne "\n\n---- Make: MB CPLD ready!\n";
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@echo -ne " Use build/usrp_x410_cpld.pof via JTAG programmer or\n"
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@echo -ne " build/usrp_x410_cpld.svf (ISP on) via PS JTAG-engine (background programming) or\n"
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@echo -ne " build/usrp_x410_cpld.rpd via reconfig engine or\n"
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@echo -ne " build/usrp_x410_cpld_isp_off.svf via JTAG test points (initial programming)\n"
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clean:
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@echo -ne "\nCleaning MB CPLD...\n";
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@git clean -Xdf
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QSYS_PATH=$(subst \,/,$(QSYS_ROOTDIR))
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ip: ip/flash/on_chip_flash/simulation/on_chip_flash.v \
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ip/clkctrl/clkctrl/simulation/clkctrl.v
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ip/flash/on_chip_flash/simulation/on_chip_flash.v:
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$(QSYS_PATH)/qsys-generate ip/flash/on_chip_flash.qsys --simulation=VERILOG
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ip/clkctrl/clkctrl/simulation/clkctrl.v:
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$(QSYS_PATH)/qsys-generate ip/clkctrl/clkctrl.qsys --simulation=VERILOG
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all: build
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.PHONY: all build clean ip
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