Wade Fife eec959f814 fpga: Add BUILD_BASE_DIR option to makefiles ...

Adds a BUILD_BASE_DIR makefile variable that allows you to specify the
base directory for FPGA build outputs. This allows you to put the
output from each run of make into a unique directory, or to run
multiple instances of make in parallel with each build's output being
put in a different directory. For example:

make X310_XG BUILD_BASE_DIR=/path/to/builds


Original-commit: bc6db8409ba756bbad0d0c158ffb00c614b58fd9

2023-02-09 07:38:49 -06:00

..

diamond_design_builder.mak

fpga: tools: Lattice build flow clean-up

2022-08-03 14:28:21 -05:00

diamond_preamble.mak

fpga: Add BUILD_BASE_DIR option to makefiles

2023-02-09 07:38:49 -06:00

quartus_design_builder.mak

fpga: tools: Add Quartus build utilities

2021-12-01 10:51:07 -06:00

quartus_ip_builder.mak

fpga: tools: Add Quartus build utilities

2021-12-01 10:51:07 -06:00

quartus_preamble.mak

fpga: Add BUILD_BASE_DIR option to makefiles

2023-02-09 07:38:49 -06:00

viv_design_builder.mak

fpga: tools: Add UHD_FPGA_DIR definition to synthesis

2021-09-08 08:36:05 -05:00

viv_hls_ip_builder.mak

fpga: tools: Fix HLS IP builder for Vivado 2021.1

2022-08-25 13:55:30 -05:00

viv_ip_builder.mak

fpga: tools: Fix python2 reference in viv_ip_builder.mak

2021-06-17 08:16:59 -05:00

viv_preamble.mak

fpga: Add BUILD_BASE_DIR option to makefiles

2023-02-09 07:38:49 -06:00

viv_sim_preamble.mak

fpga: Set default part for sim in setupenv.sh

2021-08-30 08:20:10 -05:00

viv_simulator.mak

fpga: tools: Add UHD_FPGA_DIR definition to synthesis

2021-09-08 08:36:05 -05:00