Wade Fife
6b19ec030c
This adds the NIPC parameter, which configures support for processing multiple items or samples per clock cycle. With this enabled, the FFT block can process at rates higher than 250 MSPS, such as 500 MSPS and beyond. Original-commit: fc76aa940e121fe1f85a3513f6d90df4667338cf
443 lines
17 KiB
Systemverilog
443 lines
17 KiB
Systemverilog
//
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// Copyright 2024 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: fft_pipeline
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//
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// Description:
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//
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// The module contains all FFT processing for a single channel, including
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// cyclic prefix removal, cyclic prefix insertion, FFT/IFFT, and logic to
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// change the output order of the FFT data.
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//
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// The data is input on the data input (i_t*) and output on the data output
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// (o_t*) ports. There must be one FFT/IFFT per packet, plus cyclic-prefix to
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// be removed, if applicable.
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//
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// The "global FFT settings" are treated as fixed values that won't change
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// for the duration of a single FFT/IFFT. These should only be updated when
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// everything is idle and there is no data in flight.
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//
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// The fft_config_t* input contains the per-FFT settings for the Xilinx FFT
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// core and you should write once per FFT.
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//
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// The cp_rem_t* and cp_ins_t* are the cyclic prefix removal and insertion
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// lengths. You should write one length per FFT/IFFT.
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//
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// Parameters:
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//
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// MAX_FFT_SIZE_LOG2 : Set to the log base 2 of the maximum FFT size to be
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// supported. For example, a value of 14 means the
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// maximum FFT size is 2**14 = 4096.
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// EN_CONFIG_FIFO : When 1, the fft_config_tdata AXI-Stream input is used
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// in order to allow a unique configuration per FFT
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// operation. If EN_CONFIG_FIFO is 0, then the fft_config
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// input is used instead and it is assumed to be static
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// for the duration of the FFT operation and must only
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// change while the module is idle.
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// EN_CP_REMOVAL : Controls whether to include the cyclic prefix removal
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// logic.
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// EN_CP_INSERTION : Controls whether to include the cyclic prefix
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// insertion logic. If included, EN_FFT_ORDER must be 1.
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// EN_FFT_ORDER : Set to 1 to add the optional FFT reorder core. Set to
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// 0 to remove it and save resources. Removing it also
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// disable CP insertion.
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// EN_MAGNITUDE : Set to 1 to add the magnitude output calculation core.
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// Set to 0 to remove it and save resources.
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// EN_MAGNITUDE_SQ : Set to 1 to add the magnitude squared output
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// calculation core. Set to 0 to remove it and save
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// resources.
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// USE_APPROX_MAG : Control which magnitude calculation to use. Set to 1
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// to use a simpler circuit that gives pretty good
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// results in order to save resources. Set to 0 to use
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// the CORDIC IP to calculate the magnitude.
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//
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`default_nettype none
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module fft_pipeline
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import xfft_config_pkg::*;
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#(
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int MAX_FFT_SIZE_LOG2 = 12,
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bit EN_CONFIG_FIFO = 1,
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bit EN_CP_REMOVAL = 1,
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bit EN_CP_INSERTION = 1,
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bit EN_FFT_ORDER = 1,
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bit EN_MAGNITUDE = 1,
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bit EN_MAGNITUDE_SQ = 1,
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bit USE_APPROX_MAG = 1,
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localparam int FFT_CONFIG_W = fft_config_w(MAX_FFT_SIZE_LOG2),
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localparam int DATA_W = 32,
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localparam int FFT_SIZE_LOG2_W = $clog2(MAX_FFT_SIZE_LOG2+1),
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localparam int CP_LEN_W = MAX_FFT_SIZE_LOG2
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) (
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input wire clk,
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input wire rst,
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// Global FFT settings
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input wire [ 1:0] fft_order,
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input wire [ 1:0] magnitude,
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input wire [FFT_SIZE_LOG2_W-1:0] fft_size_log2,
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input wire [ FFT_CONFIG_W-1:0] fft_config,
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// FFT IP Configuration
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input wire [FFT_CONFIG_W-1:0] fft_config_tdata,
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input wire fft_config_tvalid,
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output wire fft_config_tready,
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// CP Removal Length
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input wire [CP_LEN_W-1:0] cp_rem_tdata,
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input wire cp_rem_tvalid,
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output wire cp_rem_tready,
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// CP Insertion Length
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input wire [CP_LEN_W-1:0] cp_ins_tdata,
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input wire cp_ins_tvalid,
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output reg cp_ins_tready,
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// FFT Event Monitoring
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output wire event_fft_overflow,
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// Data Input Packets
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input wire [DATA_W-1:0] i_tdata,
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input wire i_tlast,
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input wire i_tvalid,
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output wire i_tready,
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// Data Output Packets
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output wire [DATA_W-1:0] o_tdata,
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output wire o_tlast,
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output wire o_tvalid,
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input wire o_tready
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);
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//---------------------------------------------------------------------------
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// Input FIFOs
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//---------------------------------------------------------------------------
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logic [FFT_CONFIG_W-1:0] fft_config_fifo_tdata;
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logic fft_config_fifo_tvalid;
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logic fft_config_fifo_tready;
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logic [ CP_LEN_W-1:0] cp_rem_fifo_tdata;
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logic cp_rem_fifo_tvalid;
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logic cp_rem_fifo_tready;
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logic [ CP_LEN_W-1:0] cp_ins_fifo_tdata;
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logic cp_ins_fifo_tvalid;
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logic cp_ins_fifo_tready;
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logic [DATA_W-1:0] fft_fifo_tdata;
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logic fft_fifo_tlast;
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logic fft_fifo_tvalid;
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logic fft_fifo_tready;
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if (EN_CONFIG_FIFO) begin : gen_config_fifo
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axi_fifo #(
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.WIDTH(FFT_CONFIG_W),
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.SIZE (1 )
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) axi_fifo_fft_config (
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.clk (clk ),
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.reset (rst ),
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.clear (1'b0 ),
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.i_tdata (fft_config_tdata ),
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.i_tvalid(fft_config_tvalid ),
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.i_tready(fft_config_tready ),
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.o_tdata (fft_config_fifo_tdata ),
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.o_tvalid(fft_config_fifo_tvalid),
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.o_tready(fft_config_fifo_tready),
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.space ( ),
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.occupied( )
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);
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end else begin : gen_no_config_fifo
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assign fft_config_tready = 1'b1;
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end
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if (EN_CP_REMOVAL) begin : gen_cp_rem_fifo
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axi_fifo #(
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.WIDTH(CP_LEN_W),
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.SIZE (1 )
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) axi_fifo_cp_rem (
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.clk (clk ),
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.reset (rst ),
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.clear (1'b0 ),
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.i_tdata (cp_rem_tdata ),
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.i_tvalid(cp_rem_tvalid ),
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.i_tready(cp_rem_tready ),
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.o_tdata (cp_rem_fifo_tdata ),
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.o_tvalid(cp_rem_fifo_tvalid),
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.o_tready(cp_rem_fifo_tready),
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.space ( ),
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.occupied( )
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);
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end else begin : gen_no_cp_remo_fifo
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assign cp_rem_tready = 1'b1;
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assign cp_rem_fifo_tdata = '0;
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assign cp_rem_fifo_tvalid = 1'b1;
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end
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if (EN_CP_INSERTION) begin : gen_cp_ins_fifo
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axi_fifo #(
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.WIDTH(CP_LEN_W),
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.SIZE (1 )
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) axi_fifo_cp_ins (
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.clk (clk ),
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.reset (rst ),
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.clear (1'b0 ),
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.i_tdata (cp_ins_tdata ),
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.i_tvalid(cp_ins_tvalid ),
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.i_tready(cp_ins_tready ),
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.o_tdata (cp_ins_fifo_tdata ),
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.o_tvalid(cp_ins_fifo_tvalid),
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.o_tready(cp_ins_fifo_tready),
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.space ( ),
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.occupied( )
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);
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end else begin : gen_no_cp_ins_fifo
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assign cp_ins_tready = 1'b1;
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assign cp_ins_fifo_tdata = '0;
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assign cp_ins_fifo_tvalid = 1'b1;
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end
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axi_fifo #(
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.WIDTH(1+DATA_W),
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.SIZE (1 )
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) axi_fifo_fft (
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.clk (clk ),
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.reset (rst ),
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.clear (1'b0 ),
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.i_tdata ({i_tlast, i_tdata} ),
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.i_tvalid(i_tvalid ),
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.i_tready(i_tready ),
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.o_tdata ({fft_fifo_tlast, fft_fifo_tdata}),
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.o_tvalid(fft_fifo_tvalid ),
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.o_tready(fft_fifo_tready ),
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.space ( ),
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.occupied( )
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);
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//---------------------------------------------------------------------------
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// Cyclic Prefix Removal
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//---------------------------------------------------------------------------
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logic [31:0] cp_rem_out_tdata;
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logic cp_rem_out_tlast;
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logic cp_rem_out_tvalid;
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logic cp_rem_out_tready;
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if (EN_CP_REMOVAL) begin : gen_cp_removal
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cp_removal #(
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.CP_LEN_W (CP_LEN_W ),
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.DATA_W (DATA_W )
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) cp_removal_i (
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.clk (clk ),
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.rst (rst ),
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.cp_len_tdata (cp_rem_fifo_tdata ),
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.cp_len_tvalid(cp_rem_fifo_tvalid),
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.cp_len_tready(cp_rem_fifo_tready),
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.i_tdata (fft_fifo_tdata ),
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.i_tlast (fft_fifo_tlast ),
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.i_tvalid (fft_fifo_tvalid ),
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.i_tready (fft_fifo_tready ),
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.o_tdata (cp_rem_out_tdata ),
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.o_tlast (cp_rem_out_tlast ),
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.o_tvalid (cp_rem_out_tvalid ),
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.o_tready (cp_rem_out_tready )
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);
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end else begin : gen_no_cp_removal
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assign cp_rem_out_tdata = fft_fifo_tdata;
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assign cp_rem_out_tlast = fft_fifo_tlast;
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assign cp_rem_out_tvalid = fft_fifo_tvalid;
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assign fft_fifo_tready = cp_rem_out_tready;
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end
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//---------------------------------------------------------------------------
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// XFFT Configuration Handling
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//---------------------------------------------------------------------------
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logic [31:0] fft_in_tdata;
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logic fft_in_tlast;
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logic fft_in_tvalid;
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logic fft_in_tready;
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logic [FFT_CONFIG_W-1:0] fft_config_core_tdata;
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logic fft_config_core_tvalid;
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logic fft_config_core_tready;
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// Create a register that indicates the first word transfer of packet
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// (analogous to TLAST).
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logic fft_in_tfirst = 1'b1;
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always_ff @(posedge clk) begin
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if (rst) begin
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fft_in_tfirst <= 1'b1;
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end else if (fft_in_tvalid && fft_in_tready) begin
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fft_in_tfirst <= fft_in_tlast;
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end
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end
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always_comb begin
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if (EN_CONFIG_FIFO) begin
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// In FIFO mode we require one configuration write for each FFT/IFFT
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// packet that is input. This mode was used when the XFFT IP handled the
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// CP insertion but was no longer needed when the CP insertion was moved
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// to the reorder block. We keep it in the design in case we want to use
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// a mode that requires this again in the future.
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// Only pass FFT data from cp_rem_out to fft_in when the configuration
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// FIFO has a configuration for us.
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fft_in_tdata = cp_rem_out_tdata;
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fft_in_tlast = cp_rem_out_tlast;
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fft_in_tvalid = cp_rem_out_tvalid && fft_config_fifo_tvalid;
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cp_rem_out_tready = fft_in_tready && fft_config_fifo_tvalid;
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// Pass configuration from the fft_config_fifo to fft_config_core. Write
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// the configuration when the first sample is input into the FFT core and
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// pop the configuration off the configuration FIFO when the last sample
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// is input into the FFT core.
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fft_config_core_tdata = fft_config_fifo_tdata;
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fft_config_core_tvalid = fft_in_tvalid && fft_in_tready && fft_in_tfirst;
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fft_config_fifo_tready = fft_in_tvalid && fft_in_tready && fft_in_tlast;
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end else begin
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// In non-FIFO mode we use whatever configuration value is on the
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// fft_config input.
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// Pass FFT data from cp_rem_out to fft_in
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fft_in_tdata = cp_rem_out_tdata;
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fft_in_tlast = cp_rem_out_tlast;
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fft_in_tvalid = cp_rem_out_tvalid;
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cp_rem_out_tready = fft_in_tready;
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// Write the configuration when the first sample is input into the FFT
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// core.
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fft_config_core_tdata = fft_config;
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fft_config_core_tvalid = fft_in_tvalid && fft_in_tready && fft_in_tfirst;
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fft_config_fifo_tready = 1'b1;
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end
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end
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//synthesis translate_off
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always_ff @(posedge clk) begin
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if (fft_config_core_tvalid && !fft_config_core_tready) begin
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$error("FFT configuration was not accepted by the XFFT core");
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end
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end
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//synthesis translate_on
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//---------------------------------------------------------------------------
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// FFT IP Core
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//---------------------------------------------------------------------------
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logic [31:0] fft_out_tdata;
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logic fft_out_tlast;
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logic fft_out_tvalid;
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logic fft_out_tready;
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logic event_tlast_unexpected;
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logic event_tlast_missing;
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xfft_wrapper #(
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.MAX_FFT_SIZE_LOG2(MAX_FFT_SIZE_LOG2)
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) xfft_wrapper_i (
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.aclk (clk ),
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.aresetn (~rst ),
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.s_axis_config_tdata (fft_config_core_tdata ),
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.s_axis_config_tvalid (fft_config_core_tvalid ),
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.s_axis_config_tready (fft_config_core_tready ),
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.s_axis_data_tdata ({ fft_in_tdata[15:0], fft_in_tdata[31:16] } ),
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.s_axis_data_tlast (fft_in_tlast ),
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.s_axis_data_tvalid (fft_in_tvalid ),
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.s_axis_data_tready (fft_in_tready ),
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.m_axis_data_tdata ({ fft_out_tdata[15:0], fft_out_tdata[31:16] }),
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.m_axis_data_tuser ( ),
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.m_axis_data_tlast (fft_out_tlast ),
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.m_axis_data_tvalid (fft_out_tvalid ),
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.m_axis_data_tready (fft_out_tready ),
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.m_axis_status_tdata ( ),
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.m_axis_status_tvalid ( ),
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.m_axis_status_tready (1'b1 ),
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.event_frame_started ( ),
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.event_tlast_unexpected (event_tlast_unexpected ),
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.event_tlast_missing (event_tlast_missing ),
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.event_fft_overflow (event_fft_overflow ),
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.event_status_channel_halt ( ),
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.event_data_in_channel_halt ( ),
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.event_data_out_channel_halt( )
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);
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//synthesis translate_off
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always_ff @(posedge clk) begin
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// The packets are not being correctly sized if we get an unexpected or missing TLAST.
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assert (event_tlast_unexpected != 1'b1) else $error("FFT TLAST unexpected");
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assert (event_tlast_missing != 1'b1) else $error("FFT TLAST missing");
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// Overflow can occur depending on the scaling settings and input data.
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assert (event_fft_overflow != 1'b1) else $warning("FFT overflow");
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end
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//synthesis translate_on
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//---------------------------------------------------------------------------
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// Magnitude and Data Order Post-Processing
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//---------------------------------------------------------------------------
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if (EN_FFT_ORDER || EN_MAGNITUDE || EN_MAGNITUDE_SQ) begin : gen_fft_post_processing
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logic [ DATA_W-1:0] pp_in_tdata;
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logic [CP_LEN_W-1:0] pp_in_tuser;
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logic pp_in_tlast;
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logic pp_in_tvalid;
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logic pp_in_tready;
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// Only transfer data when both the data and CP FIFOs have their data
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// available.
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assign pp_in_tdata = fft_out_tdata;
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assign pp_in_tuser = cp_ins_fifo_tdata;
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assign pp_in_tlast = fft_out_tlast;
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assign pp_in_tvalid = fft_out_tvalid && cp_ins_fifo_tvalid;
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assign fft_out_tready = pp_in_tready && cp_ins_fifo_tvalid;
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// Pop the CP off the FIFO at the end of the packet
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assign cp_ins_fifo_tready = pp_in_tready && pp_in_tvalid && pp_in_tlast;
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fft_post_processing #(
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.EN_FFT_ORDER (EN_FFT_ORDER ),
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.EN_CP_INSERTION (EN_CP_INSERTION ),
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.EN_MAGNITUDE (EN_MAGNITUDE ),
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.EN_MAGNITUDE_SQ (EN_MAGNITUDE_SQ ),
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.USE_APPROX_MAG (USE_APPROX_MAG ),
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.MAX_FFT_SIZE_LOG2(MAX_FFT_SIZE_LOG2)
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) fft_post_processing_i (
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.clk (clk ),
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.rst (rst ),
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.fft_order_sel(fft_order ),
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.magnitude_sel(magnitude ),
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.fft_size_log2(fft_size_log2),
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.s_axis_tdata (pp_in_tdata ),
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.s_axis_tuser (pp_in_tuser ),
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.s_axis_tlast (pp_in_tlast ),
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.s_axis_tvalid(pp_in_tvalid ),
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.s_axis_tready(pp_in_tready ),
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.m_axis_tdata (o_tdata ),
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.m_axis_tlast (o_tlast ),
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.m_axis_tvalid(o_tvalid ),
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.m_axis_tready(o_tready )
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);
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end else begin : gen_no_fft_post_processing
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assign cp_ins_fifo_tready = 1'b1;
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assign o_tdata = fft_out_tdata;
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assign o_tlast = fft_out_tlast;
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assign o_tvalid = fft_out_tvalid;
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assign fft_out_tready = o_tready;
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end
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endmodule : fft_pipeline
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`default_nettype wire
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