This commit refactors the X410's CPLDs build process to make it similar to other FPGA targets within the repo. The new process relies on basic Quartus build utilities. Additionally, this commit adds support for an alternative MAX10 CPLD for the motherboard CPLD implementation. Both previous (10M04) and new variant (10M08) are supported concurrently. The images package mapping is updated to reflect these changes. Original-commit: e1ce4565dbc7336ee806adce7c087bda4fcc77ae
39 lines
1.2 KiB
XML
39 lines
1.2 KiB
XML
<?xml version="1.0" encoding="US-ASCII" standalone="yes"?>
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<cof>
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<output_filename>output_files/zbx_top_cpld_converted.pof</output_filename>
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<n_pages>1</n_pages>
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<width>1</width>
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<mode>14</mode>
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<sof_data>
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<user_name>Page_0</user_name>
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<page_flags>1</page_flags>
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<bit0>
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<sof_filename>output_files/zbx_top_cpld.sof<compress_bitstream>1</compress_bitstream></sof_filename>
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</bit0>
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</sof_data>
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<version>10</version>
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<create_cvp_file>0</create_cvp_file>
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<create_hps_iocsr>0</create_hps_iocsr>
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<auto_create_rpd>1</auto_create_rpd>
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<rpd_little_endian>1</rpd_little_endian>
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<options>
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<map_file>1</map_file>
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</options>
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<MAX10_device_options>
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<por>0</por>
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<io_pullup>1</io_pullup>
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<config_from_cfm0_only>0</config_from_cfm0_only>
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<isp_source>0</isp_source>
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<verify_protect>0</verify_protect>
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<epof>0</epof>
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<ufm_source>0</ufm_source>
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</MAX10_device_options>
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<advanced_options>
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<ignore_epcs_id_check>1</ignore_epcs_id_check>
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<ignore_condone_check>2</ignore_condone_check>
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<plc_adjustment>0</plc_adjustment>
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<post_chain_bitstream_pad_bytes>-1</post_chain_bitstream_pad_bytes>
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<post_device_bitstream_pad_bytes>-1</post_device_bitstream_pad_bytes>
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<bitslice_pre_padding>1</bitslice_pre_padding>
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</advanced_options>
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</cof> |