adf6f576c6
FPGA: - Split up MB registers that control daughterboard specific settings so that daughterboards 0 and 1 could have different setings, in preparation for future devices that require different settings. This requires a compat number bump to 8.0. - Add registers for additional RFDC information, including the block/tile mapping of the individual channels, and information about resampling capabilities - Identify sections of code that would be specific to X410/ZBX and move them to their own headers, so it's trivial to add device-specific sections of code instead for other devices in the future. - This includes constraints for clocks and I/O pins. - Remove ability to do timed ctrlport transactions to the MB CPLD, this was unused and possibly broken. - Move daughterboard-specific code into its own code location (dboards/zbx) - Move X410-specific register documentation to its own location (doc/X410) - Refactor Makefiles to split out X410/ZBX specific components and allow switching between device types - Add 512-bit AXI interconnects - Make number of timekeepers configurable (X410 keeps the single timekeeper) MPM: - Required compat is bumped to 8.0 - Now supports new registers for detecting DSP capabilities and multi-rate settings for the daughterboards - Adds MMCM controls (currently unused) Co-authored-by: Wade Fife <wade.fife@ni.com> Co-authored-by: Ryan Marlow <ryan@lmarlow.com> Co-authored-by: Martin Braun <martin.braun@ettus.com> Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com> Original-commit: c1d268917ea65dd9c5a42366014cb96d3c025223
154 lines
9.2 KiB
Systemverilog
154 lines
9.2 KiB
Systemverilog
//
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// Copyright 2023 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: versioning_regs_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// CURRENT_VERSION : 0x0 (x4xx_versioning_regs.v)
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// OLDEST_COMPATIBLE_VERSION : 0x4 (x4xx_versioning_regs.v)
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// VERSION_LAST_MODIFIED : 0x8 (x4xx_versioning_regs.v)
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// RESERVED : 0xC (x4xx_versioning_regs.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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// RESERVED_TYPE Type (from x4xx_versioning_regs.v)
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localparam RESERVED_TYPE_SIZE = 32;
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localparam RESERVED_TYPE_MASK = 32'h0;
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// TIMESTAMP_TYPE Type (from x4xx_versioning_regs.v)
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localparam TIMESTAMP_TYPE_SIZE = 32;
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localparam TIMESTAMP_TYPE_MASK = 32'hFFFFFFFF;
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localparam HH_SIZE = 8; //TIMESTAMP_TYPE:HH
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localparam HH_MSB = 7; //TIMESTAMP_TYPE:HH
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localparam HH = 0; //TIMESTAMP_TYPE:HH
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localparam DD_SIZE = 8; //TIMESTAMP_TYPE:DD
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localparam DD_MSB = 15; //TIMESTAMP_TYPE:DD
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localparam DD = 8; //TIMESTAMP_TYPE:DD
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localparam MM_SIZE = 8; //TIMESTAMP_TYPE:MM
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localparam MM_MSB = 23; //TIMESTAMP_TYPE:MM
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localparam MM = 16; //TIMESTAMP_TYPE:MM
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localparam YY_SIZE = 8; //TIMESTAMP_TYPE:YY
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localparam YY_MSB = 31; //TIMESTAMP_TYPE:YY
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localparam YY = 24; //TIMESTAMP_TYPE:YY
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// VERSION_TYPE Type (from x4xx_versioning_regs.v)
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localparam VERSION_TYPE_SIZE = 32;
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localparam VERSION_TYPE_MASK = 32'hFFFFFFFF;
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localparam BUILD_SIZE = 12; //VERSION_TYPE:BUILD
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localparam BUILD_MSB = 11; //VERSION_TYPE:BUILD
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localparam BUILD = 0; //VERSION_TYPE:BUILD
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localparam MINOR_SIZE = 11; //VERSION_TYPE:MINOR
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localparam MINOR_MSB = 22; //VERSION_TYPE:MINOR
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localparam MINOR = 12; //VERSION_TYPE:MINOR
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localparam MAJOR_SIZE = 9; //VERSION_TYPE:MAJOR
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localparam MAJOR_MSB = 31; //VERSION_TYPE:MAJOR
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localparam MAJOR = 23; //VERSION_TYPE:MAJOR
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//===============================================================================
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// Register Group VERSIONING_CONSTANTS
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//===============================================================================
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// Enumerated type CPLD_IFC_VERSION
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localparam CPLD_IFC_VERSION_SIZE = 7;
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localparam CPLD_IFC_CURRENT_VERSION_MINOR = 'h0; // CPLD_IFC_VERSION:CPLD_IFC_CURRENT_VERSION_MINOR
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localparam CPLD_IFC_CURRENT_VERSION_BUILD = 'h0; // CPLD_IFC_VERSION:CPLD_IFC_CURRENT_VERSION_BUILD
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localparam CPLD_IFC_OLDEST_COMPATIBLE_VERSION_MINOR = 'h0; // CPLD_IFC_VERSION:CPLD_IFC_OLDEST_COMPATIBLE_VERSION_MINOR
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localparam CPLD_IFC_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // CPLD_IFC_VERSION:CPLD_IFC_OLDEST_COMPATIBLE_VERSION_BUILD
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localparam CPLD_IFC_CURRENT_VERSION_MAJOR = 'h2; // CPLD_IFC_VERSION:CPLD_IFC_CURRENT_VERSION_MAJOR
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localparam CPLD_IFC_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h2; // CPLD_IFC_VERSION:CPLD_IFC_OLDEST_COMPATIBLE_VERSION_MAJOR
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localparam CPLD_IFC_VERSION_LAST_MODIFIED_TIME = 'h21011809; // CPLD_IFC_VERSION:CPLD_IFC_VERSION_LAST_MODIFIED_TIME
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// Enumerated type DB_GPIO_IFC_VERSION
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localparam DB_GPIO_IFC_VERSION_SIZE = 7;
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localparam DB_GPIO_IFC_CURRENT_VERSION_MINOR = 'h0; // DB_GPIO_IFC_VERSION:DB_GPIO_IFC_CURRENT_VERSION_MINOR
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localparam DB_GPIO_IFC_CURRENT_VERSION_BUILD = 'h0; // DB_GPIO_IFC_VERSION:DB_GPIO_IFC_CURRENT_VERSION_BUILD
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localparam DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_MINOR = 'h0; // DB_GPIO_IFC_VERSION:DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_MINOR
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localparam DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // DB_GPIO_IFC_VERSION:DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_BUILD
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localparam DB_GPIO_IFC_CURRENT_VERSION_MAJOR = 'h1; // DB_GPIO_IFC_VERSION:DB_GPIO_IFC_CURRENT_VERSION_MAJOR
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localparam DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h1; // DB_GPIO_IFC_VERSION:DB_GPIO_IFC_OLDEST_COMPATIBLE_VERSION_MAJOR
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localparam DB_GPIO_IFC_VERSION_LAST_MODIFIED_TIME = 'h20110616; // DB_GPIO_IFC_VERSION:DB_GPIO_IFC_VERSION_LAST_MODIFIED_TIME
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// Enumerated type FPGA_VERSION
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localparam FPGA_VERSION_SIZE = 7;
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localparam FPGA_CURRENT_VERSION_MINOR = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_MINOR
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localparam FPGA_CURRENT_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_CURRENT_VERSION_BUILD
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localparam FPGA_OLDEST_COMPATIBLE_VERSION_MINOR = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MINOR
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localparam FPGA_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_BUILD
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localparam FPGA_CURRENT_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_CURRENT_VERSION_MAJOR
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localparam FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h8; // FPGA_VERSION:FPGA_OLDEST_COMPATIBLE_VERSION_MAJOR
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localparam FPGA_VERSION_LAST_MODIFIED_TIME = 'h23042011; // FPGA_VERSION:FPGA_VERSION_LAST_MODIFIED_TIME
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// Enumerated type RF_CORE_100M_VERSION
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localparam RF_CORE_100M_VERSION_SIZE = 7;
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localparam RF_CORE_100M_CURRENT_VERSION_MINOR = 'h0; // RF_CORE_100M_VERSION:RF_CORE_100M_CURRENT_VERSION_MINOR
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localparam RF_CORE_100M_CURRENT_VERSION_BUILD = 'h0; // RF_CORE_100M_VERSION:RF_CORE_100M_CURRENT_VERSION_BUILD
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localparam RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_MINOR = 'h0; // RF_CORE_100M_VERSION:RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_MINOR
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localparam RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // RF_CORE_100M_VERSION:RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_BUILD
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localparam RF_CORE_100M_CURRENT_VERSION_MAJOR = 'h1; // RF_CORE_100M_VERSION:RF_CORE_100M_CURRENT_VERSION_MAJOR
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localparam RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h1; // RF_CORE_100M_VERSION:RF_CORE_100M_OLDEST_COMPATIBLE_VERSION_MAJOR
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localparam RF_CORE_100M_VERSION_LAST_MODIFIED_TIME = 'h20102617; // RF_CORE_100M_VERSION:RF_CORE_100M_VERSION_LAST_MODIFIED_TIME
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// Enumerated type RF_CORE_400M_VERSION
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localparam RF_CORE_400M_VERSION_SIZE = 7;
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localparam RF_CORE_400M_CURRENT_VERSION_MINOR = 'h0; // RF_CORE_400M_VERSION:RF_CORE_400M_CURRENT_VERSION_MINOR
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localparam RF_CORE_400M_CURRENT_VERSION_BUILD = 'h0; // RF_CORE_400M_VERSION:RF_CORE_400M_CURRENT_VERSION_BUILD
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localparam RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_MINOR = 'h0; // RF_CORE_400M_VERSION:RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_MINOR
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localparam RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_BUILD = 'h0; // RF_CORE_400M_VERSION:RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_BUILD
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localparam RF_CORE_400M_CURRENT_VERSION_MAJOR = 'h1; // RF_CORE_400M_VERSION:RF_CORE_400M_CURRENT_VERSION_MAJOR
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localparam RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_MAJOR = 'h1; // RF_CORE_400M_VERSION:RF_CORE_400M_OLDEST_COMPATIBLE_VERSION_MAJOR
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localparam RF_CORE_400M_VERSION_LAST_MODIFIED_TIME = 'h20102617; // RF_CORE_400M_VERSION:RF_CORE_400M_VERSION_LAST_MODIFIED_TIME
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//===============================================================================
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// Register Group VERSIONING_REGS
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//===============================================================================
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// Enumerated type COMPONENTS_INDEXES
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localparam COMPONENTS_INDEXES_SIZE = 6;
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localparam FPGA_VERSION_INDEX = 'h0; // COMPONENTS_INDEXES:FPGA_VERSION_INDEX
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localparam CPLD_IFC_INDEX = 'h1; // COMPONENTS_INDEXES:CPLD_IFC_INDEX
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localparam DB0_RF_CORE_INDEX = 'h2; // COMPONENTS_INDEXES:DB0_RF_CORE_INDEX
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localparam DB1_RF_CORE_INDEX = 'h3; // COMPONENTS_INDEXES:DB1_RF_CORE_INDEX
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localparam DB0_GPIO_IFC_INDEX = 'h4; // COMPONENTS_INDEXES:DB0_GPIO_IFC_INDEX
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localparam DB1_GPIO_IFC_INDEX = 'h5; // COMPONENTS_INDEXES:DB1_GPIO_IFC_INDEX
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// CURRENT_VERSION Register (from x4xx_versioning_regs.v)
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localparam CURRENT_VERSION_COUNT = 64; // Number of elements in array
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// OLDEST_COMPATIBLE_VERSION Register (from x4xx_versioning_regs.v)
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localparam OLDEST_COMPATIBLE_VERSION_COUNT = 64; // Number of elements in array
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// VERSION_LAST_MODIFIED Register (from x4xx_versioning_regs.v)
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localparam VERSION_LAST_MODIFIED_COUNT = 64; // Number of elements in array
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// RESERVED Register (from x4xx_versioning_regs.v)
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localparam RESERVED_COUNT = 64; // Number of elements in array
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// Return the offset of an element of register array CURRENT_VERSION
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function integer CURRENT_VERSION (input integer i);
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CURRENT_VERSION = (i * 'h10) + 'h0;
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endfunction
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// Return the offset of an element of register array OLDEST_COMPATIBLE_VERSION
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function integer OLDEST_COMPATIBLE_VERSION (input integer i);
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OLDEST_COMPATIBLE_VERSION = (i * 'h10) + 'h4;
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endfunction
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// Return the offset of an element of register array VERSION_LAST_MODIFIED
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function integer VERSION_LAST_MODIFIED (input integer i);
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VERSION_LAST_MODIFIED = (i * 'h10) + 'h8;
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endfunction
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// Return the offset of an element of register array RESERVED
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function integer RESERVED (input integer i);
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RESERVED = (i * 'h10) + 'hC;
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endfunction
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