This commit refactors the X410's CPLDs build process to make it similar to other FPGA targets within the repo. The new process relies on basic Quartus build utilities. Additionally, this commit adds support for an alternative MAX10 CPLD for the motherboard CPLD implementation. Both previous (10M04) and new variant (10M08) are supported concurrently. The images package mapping is updated to reflect these changes. Original-commit: e1ce4565dbc7336ee806adce7c087bda4fcc77ae
139 lines
9.1 KiB
Systemverilog
139 lines
9.1 KiB
Systemverilog
//
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// Copyright 2021 Ettus Research, A National Instruments Company
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: reconfig_regmap_utils.vh
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// Description:
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// The constants in this file are autogenerated by XmlParse.
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//===============================================================================
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// A numerically ordered list of registers and their HDL source files
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//===============================================================================
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// FLASH_STATUS_REG : 0x0 (reconfig_engine.v)
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// FLASH_CONTROL_REG : 0x4 (reconfig_engine.v)
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// FLASH_ADDR_REG : 0x8 (reconfig_engine.v)
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// FLASH_WRITE_DATA_REG : 0xC (reconfig_engine.v)
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// FLASH_READ_DATA_REG : 0x10 (reconfig_engine.v)
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// FLASH_CFM0_START_ADDR_REG : 0x14 (reconfig_engine.v)
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// FLASH_CFM0_END_ADDR_REG : 0x18 (reconfig_engine.v)
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//===============================================================================
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// RegTypes
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//===============================================================================
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//===============================================================================
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// Register Group RECONFIG_REGS
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//===============================================================================
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// Enumerated type FLASH_PRIMARY_IMAGE_ADDR_ENUM
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localparam FLASH_PRIMARY_IMAGE_ADDR_ENUM_SIZE = 6;
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localparam FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04 = 'h1000; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M04
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localparam FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08 = 'h2000; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_MEM_INIT_10M08
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localparam FLASH_PRIMARY_IMAGE_START_ADDR_10M04 = 'h9C00; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_10M04
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localparam FLASH_PRIMARY_IMAGE_START_ADDR_10M08 = 'hAC00; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_START_ADDR_10M08
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localparam FLASH_PRIMARY_IMAGE_END_ADDR_10M04 = 'h127FF; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_END_ADDR_10M04
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localparam FLASH_PRIMARY_IMAGE_END_ADDR_10M08 = 'h137FF; // FLASH_PRIMARY_IMAGE_ADDR_ENUM:FLASH_PRIMARY_IMAGE_END_ADDR_10M08
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// FLASH_STATUS_REG Register (from reconfig_engine.v)
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localparam FLASH_STATUS_REG = 'h0; // Register Offset
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localparam FLASH_STATUS_REG_SIZE = 32; // register width in bits
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localparam FLASH_STATUS_REG_MASK = 32'h13331;
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localparam FLASH_WP_ENABLED_SIZE = 1; //FLASH_STATUS_REG:FLASH_WP_ENABLED
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localparam FLASH_WP_ENABLED_MSB = 0; //FLASH_STATUS_REG:FLASH_WP_ENABLED
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localparam FLASH_WP_ENABLED = 0; //FLASH_STATUS_REG:FLASH_WP_ENABLED
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localparam FLASH_READ_IDLE_SIZE = 1; //FLASH_STATUS_REG:FLASH_READ_IDLE
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localparam FLASH_READ_IDLE_MSB = 4; //FLASH_STATUS_REG:FLASH_READ_IDLE
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localparam FLASH_READ_IDLE = 4; //FLASH_STATUS_REG:FLASH_READ_IDLE
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localparam FLASH_READ_ERR_SIZE = 1; //FLASH_STATUS_REG:FLASH_READ_ERR
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localparam FLASH_READ_ERR_MSB = 5; //FLASH_STATUS_REG:FLASH_READ_ERR
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localparam FLASH_READ_ERR = 5; //FLASH_STATUS_REG:FLASH_READ_ERR
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localparam FLASH_ERASE_IDLE_SIZE = 1; //FLASH_STATUS_REG:FLASH_ERASE_IDLE
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localparam FLASH_ERASE_IDLE_MSB = 8; //FLASH_STATUS_REG:FLASH_ERASE_IDLE
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localparam FLASH_ERASE_IDLE = 8; //FLASH_STATUS_REG:FLASH_ERASE_IDLE
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localparam FLASH_ERASE_ERR_SIZE = 1; //FLASH_STATUS_REG:FLASH_ERASE_ERR
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localparam FLASH_ERASE_ERR_MSB = 9; //FLASH_STATUS_REG:FLASH_ERASE_ERR
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localparam FLASH_ERASE_ERR = 9; //FLASH_STATUS_REG:FLASH_ERASE_ERR
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localparam FLASH_WRITE_IDLE_SIZE = 1; //FLASH_STATUS_REG:FLASH_WRITE_IDLE
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localparam FLASH_WRITE_IDLE_MSB = 12; //FLASH_STATUS_REG:FLASH_WRITE_IDLE
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localparam FLASH_WRITE_IDLE = 12; //FLASH_STATUS_REG:FLASH_WRITE_IDLE
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localparam FLASH_WRITE_ERR_SIZE = 1; //FLASH_STATUS_REG:FLASH_WRITE_ERR
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localparam FLASH_WRITE_ERR_MSB = 13; //FLASH_STATUS_REG:FLASH_WRITE_ERR
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localparam FLASH_WRITE_ERR = 13; //FLASH_STATUS_REG:FLASH_WRITE_ERR
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localparam FLASH_MEM_INIT_ENABLED_SIZE = 1; //FLASH_STATUS_REG:FLASH_MEM_INIT_ENABLED
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localparam FLASH_MEM_INIT_ENABLED_MSB = 16; //FLASH_STATUS_REG:FLASH_MEM_INIT_ENABLED
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localparam FLASH_MEM_INIT_ENABLED = 16; //FLASH_STATUS_REG:FLASH_MEM_INIT_ENABLED
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// FLASH_CONTROL_REG Register (from reconfig_engine.v)
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localparam FLASH_CONTROL_REG = 'h4; // Register Offset
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localparam FLASH_CONTROL_REG_SIZE = 32; // register width in bits
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localparam FLASH_CONTROL_REG_MASK = 32'h7FF;
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localparam FLASH_ENABLE_WP_STB_SIZE = 1; //FLASH_CONTROL_REG:FLASH_ENABLE_WP_STB
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localparam FLASH_ENABLE_WP_STB_MSB = 0; //FLASH_CONTROL_REG:FLASH_ENABLE_WP_STB
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localparam FLASH_ENABLE_WP_STB = 0; //FLASH_CONTROL_REG:FLASH_ENABLE_WP_STB
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localparam FLASH_DISABLE_WP_STB_SIZE = 1; //FLASH_CONTROL_REG:FLASH_DISABLE_WP_STB
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localparam FLASH_DISABLE_WP_STB_MSB = 1; //FLASH_CONTROL_REG:FLASH_DISABLE_WP_STB
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localparam FLASH_DISABLE_WP_STB = 1; //FLASH_CONTROL_REG:FLASH_DISABLE_WP_STB
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localparam FLASH_READ_STB_SIZE = 1; //FLASH_CONTROL_REG:FLASH_READ_STB
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localparam FLASH_READ_STB_MSB = 2; //FLASH_CONTROL_REG:FLASH_READ_STB
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localparam FLASH_READ_STB = 2; //FLASH_CONTROL_REG:FLASH_READ_STB
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localparam FLASH_WRITE_STB_SIZE = 1; //FLASH_CONTROL_REG:FLASH_WRITE_STB
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localparam FLASH_WRITE_STB_MSB = 3; //FLASH_CONTROL_REG:FLASH_WRITE_STB
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localparam FLASH_WRITE_STB = 3; //FLASH_CONTROL_REG:FLASH_WRITE_STB
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localparam FLASH_ERASE_STB_SIZE = 1; //FLASH_CONTROL_REG:FLASH_ERASE_STB
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localparam FLASH_ERASE_STB_MSB = 4; //FLASH_CONTROL_REG:FLASH_ERASE_STB
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localparam FLASH_ERASE_STB = 4; //FLASH_CONTROL_REG:FLASH_ERASE_STB
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localparam FLASH_ERASE_SECTOR_SIZE = 3; //FLASH_CONTROL_REG:FLASH_ERASE_SECTOR
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localparam FLASH_ERASE_SECTOR_MSB = 7; //FLASH_CONTROL_REG:FLASH_ERASE_SECTOR
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localparam FLASH_ERASE_SECTOR = 5; //FLASH_CONTROL_REG:FLASH_ERASE_SECTOR
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localparam CLEAR_FLASH_READ_ERROR_STB_SIZE = 1; //FLASH_CONTROL_REG:CLEAR_FLASH_READ_ERROR_STB
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localparam CLEAR_FLASH_READ_ERROR_STB_MSB = 8; //FLASH_CONTROL_REG:CLEAR_FLASH_READ_ERROR_STB
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localparam CLEAR_FLASH_READ_ERROR_STB = 8; //FLASH_CONTROL_REG:CLEAR_FLASH_READ_ERROR_STB
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localparam CLEAR_FLASH_WRITE_ERROR_STB_SIZE = 1; //FLASH_CONTROL_REG:CLEAR_FLASH_WRITE_ERROR_STB
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localparam CLEAR_FLASH_WRITE_ERROR_STB_MSB = 9; //FLASH_CONTROL_REG:CLEAR_FLASH_WRITE_ERROR_STB
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localparam CLEAR_FLASH_WRITE_ERROR_STB = 9; //FLASH_CONTROL_REG:CLEAR_FLASH_WRITE_ERROR_STB
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localparam CLEAR_FLASH_ERASE_ERROR_STB_SIZE = 1; //FLASH_CONTROL_REG:CLEAR_FLASH_ERASE_ERROR_STB
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localparam CLEAR_FLASH_ERASE_ERROR_STB_MSB = 10; //FLASH_CONTROL_REG:CLEAR_FLASH_ERASE_ERROR_STB
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localparam CLEAR_FLASH_ERASE_ERROR_STB = 10; //FLASH_CONTROL_REG:CLEAR_FLASH_ERASE_ERROR_STB
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// FLASH_ADDR_REG Register (from reconfig_engine.v)
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localparam FLASH_ADDR_REG = 'h8; // Register Offset
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localparam FLASH_ADDR_REG_SIZE = 32; // register width in bits
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localparam FLASH_ADDR_REG_MASK = 32'h1FFFF;
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localparam FLASH_ADDR_SIZE = 17; //FLASH_ADDR_REG:FLASH_ADDR
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localparam FLASH_ADDR_MSB = 16; //FLASH_ADDR_REG:FLASH_ADDR
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localparam FLASH_ADDR = 0; //FLASH_ADDR_REG:FLASH_ADDR
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// FLASH_WRITE_DATA_REG Register (from reconfig_engine.v)
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localparam FLASH_WRITE_DATA_REG = 'hC; // Register Offset
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localparam FLASH_WRITE_DATA_REG_SIZE = 32; // register width in bits
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localparam FLASH_WRITE_DATA_REG_MASK = 32'hFFFFFFFF;
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localparam FLASH_WRITE_DATA_SIZE = 32; //FLASH_WRITE_DATA_REG:FLASH_WRITE_DATA
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localparam FLASH_WRITE_DATA_MSB = 31; //FLASH_WRITE_DATA_REG:FLASH_WRITE_DATA
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localparam FLASH_WRITE_DATA = 0; //FLASH_WRITE_DATA_REG:FLASH_WRITE_DATA
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// FLASH_READ_DATA_REG Register (from reconfig_engine.v)
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localparam FLASH_READ_DATA_REG = 'h10; // Register Offset
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localparam FLASH_READ_DATA_REG_SIZE = 32; // register width in bits
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localparam FLASH_READ_DATA_REG_MASK = 32'hFFFFFFFF;
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localparam FLASH_READ_DATA_SIZE = 32; //FLASH_READ_DATA_REG:FLASH_READ_DATA
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localparam FLASH_READ_DATA_MSB = 31; //FLASH_READ_DATA_REG:FLASH_READ_DATA
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localparam FLASH_READ_DATA = 0; //FLASH_READ_DATA_REG:FLASH_READ_DATA
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// FLASH_CFM0_START_ADDR_REG Register (from reconfig_engine.v)
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localparam FLASH_CFM0_START_ADDR_REG = 'h14; // Register Offset
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localparam FLASH_CFM0_START_ADDR_REG_SIZE = 32; // register width in bits
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localparam FLASH_CFM0_START_ADDR_REG_MASK = 32'hFFFFFFFF;
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localparam FLASH_CFM0_START_ADDR_SIZE = 32; //FLASH_CFM0_START_ADDR_REG:FLASH_CFM0_START_ADDR
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localparam FLASH_CFM0_START_ADDR_MSB = 31; //FLASH_CFM0_START_ADDR_REG:FLASH_CFM0_START_ADDR
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localparam FLASH_CFM0_START_ADDR = 0; //FLASH_CFM0_START_ADDR_REG:FLASH_CFM0_START_ADDR
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// FLASH_CFM0_END_ADDR_REG Register (from reconfig_engine.v)
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localparam FLASH_CFM0_END_ADDR_REG = 'h18; // Register Offset
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localparam FLASH_CFM0_END_ADDR_REG_SIZE = 32; // register width in bits
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localparam FLASH_CFM0_END_ADDR_REG_MASK = 32'hFFFFFFFF;
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localparam FLASH_CFM0_END_ADDR_SIZE = 32; //FLASH_CFM0_END_ADDR_REG:FLASH_CFM0_END_ADDR
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localparam FLASH_CFM0_END_ADDR_MSB = 31; //FLASH_CFM0_END_ADDR_REG:FLASH_CFM0_END_ADDR
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localparam FLASH_CFM0_END_ADDR = 0; //FLASH_CFM0_END_ADDR_REG:FLASH_CFM0_END_ADDR
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