Wade FifeandMartin Braun
f2b4426b0f
This adds several features to the SystemVerilog Eth/IPv4/UDP transport adaptor including: - Compat register - NODE_INST register - Capabilities register - KV map access for custom routing on RX data paths - CHDR header removal for raw payloads to be sent over UDP Also adds xport_adapter_ctrl.py, which allows controlling the new registers. Co-authored-by: Martin Braun <martin.braun@ettus.com> Original-commit: 3c3da4c62f33d02bb05bcdc38e8929cbf2cdd9a3
95 lines
3.6 KiB
Systemverilog
95 lines
3.6 KiB
Systemverilog
//
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// Copyright 2020 Ettus Research, a National Instruments Brand
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//
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// SPDX-License-Identifier: LGPL-3.0-or-later
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//
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// Module: eth_regs.vh (Header File)
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//
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// Description:
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//
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// Defines the register offsets for the Ethernet interface. These depend on
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// the parameters below.
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//
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// Parameters:
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//
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// REG_AWIDTH - Width of the address bus used to address these registers.
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// BASE - Base address to be added to the offsets here.
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//
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//-----------------------------------------------------------------------------
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// XGE/CGE Mac Registers
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//-----------------------------------------------------------------------------
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// Allocate one full page (0x1000 bytes) for MAC starting at the base address.
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// This is the location of MAC address in XGE.
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localparam [REG_AWIDTH-1:0] REG_MAC_LSB = BASE + 'h0000;
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localparam [REG_AWIDTH-1:0] REG_MAC_MSB = BASE + 'h0004;
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//-----------------------------------------------------------------------------
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// UIO Registers
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//-----------------------------------------------------------------------------
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// Device's IP address and UDP port
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localparam [REG_AWIDTH-1:0] REG_IP = BASE + 'h1000;
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localparam [REG_AWIDTH-1:0] REG_UDP = BASE + 'h1004;
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// Registers for the Ethernet bridge between CPU and FPGA
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localparam [REG_AWIDTH-1:0] REG_BRIDGE_MAC_LSB = BASE + 'h1010;
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localparam [REG_AWIDTH-1:0] REG_BRIDGE_MAC_MSB = BASE + 'h1014;
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localparam [REG_AWIDTH-1:0] REG_BRIDGE_IP = BASE + 'h1018;
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localparam [REG_AWIDTH-1:0] REG_BRIDGE_UDP = BASE + 'h101c;
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localparam [REG_AWIDTH-1:0] REG_BRIDGE_ENABLE = BASE + 'h1020;
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// Dropped packet debug registers
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localparam [REG_AWIDTH-1:0] REG_CHDR_DROPPED = BASE + 'h1030;
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localparam [REG_AWIDTH-1:0] REG_CPU_DROPPED = BASE + 'h1034;
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// Pause frame control
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localparam [REG_AWIDTH-1:0] REG_PAUSE = BASE + 'h1038;
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//-------------------------------------
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// Transport Adapter Registers
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//-------------------------------------
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// Compatibility Number (Read-Only)
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// COMPAT[31:16] = <Reserved>
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// COMPAT[15: 8] = Major
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// COMPAT[ 7: 0] = Minor
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localparam [REG_AWIDTH-1:0] REG_XPORT_COMPAT = BASE + 'h1100;
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// Capabilities (Read-Only)
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// INFO[31:4] = <Reserved>
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// INFO[3] = <Reserved> TX CHDR header insertion
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// INFO[2] = <Reserved> TX KV-map
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// INFO[1] = RX CHDR header removal
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// INFO[0] = RX KV-map
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localparam [REG_AWIDTH-1:0] REG_XPORT_INFO = BASE + 'h1104;
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// Node Instance (Read-Only)
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// NODE_ISNT[31:0] = Node instance number for this transport adapter
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localparam [REG_AWIDTH-1:0] REG_XPORT_NODE_INST = BASE + 'h1108;
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// Key-Value Map Configuration
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//
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// You should poll KV_CFG and wait until the BUSY bit is 0 before updating
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// these registers. A write to KV_CFG causes the key-value map entry described
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// by these registers to be committed to the KV map. Therefore, the write to
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// KV_CFG should be the last write when adding an entry.
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//
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// KV_MAC_LO[31:0] = MAC[31:0] (Write-Only)
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localparam [REG_AWIDTH-1:0] REG_XPORT_KV_MAC_LO = BASE + 'h110C;
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// KV_MAC_HI[31:0] = MAC[47:31] (Write-Only)
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localparam [REG_AWIDTH-1:0] REG_XPORT_KV_MAC_HI = BASE + 'h1110;
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// KV_IP[31:0] = IP Address (Write-Only)
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localparam [REG_AWIDTH-1:0] REG_XPORT_KV_IP = BASE + 'h1114;
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// KV_UDP[31:0] = <Reserved>
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// KV_UDP[15:0] = UDP Address (Write-Only)
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localparam [REG_AWIDTH-1:0] REG_XPORT_KV_UDP = BASE + 'h1118;
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// KV_CFG[31] = KV map is busy; do not write to KV registers. (Read-Only)
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// KV_CFG[30:17] = <Reserved>
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// KV_CFG[16] = Mode (0 = CHDR, 1 = Raw Payload) (Write-only)
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// KV_CFG[15:0] = CHDR Endpoint ID (EPID) (Write-Only)
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localparam [REG_AWIDTH-1:0] REG_XPORT_KV_CFG = BASE + 'h111C;
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