423 lines
23 KiB
Plaintext
423 lines
23 KiB
Plaintext
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 2018 Intel Corporation. All rights reserved.
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# Your use of Intel Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Intel Program License
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# Subscription Agreement, the Intel Quartus Prime License Agreement,
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# the Intel FPGA IP License Agreement, or other applicable license
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# agreement, including, without limitation, that your use is for
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# the sole purpose of programming logic devices manufactured by
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# Intel and sold by Intel or its authorized distributors. Please
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# refer to the applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus Prime
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# Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition
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# Date created = 12:02:17 February 20, 2019
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# TopCpld_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus Prime software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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#--------------------------------------------------------------------------
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# Project properties/settings
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#--------------------------------------------------------------------------
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set_global_assignment -name FAMILY "MAX 10"
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set_global_assignment -name DEVICE 10M04SAU169I7G
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set_global_assignment -name TOP_LEVEL_ENTITY mb_cpld
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.1.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:02:17 FEBRUARY 20, 2019"
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set_global_assignment -name LAST_QUARTUS_VERSION "20.1.0 Standard Edition"
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON
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set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %"
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set_global_assignment -name ENABLE_OCT_DONE OFF
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set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
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set_global_assignment -name ENABLE_JTAG_PIN_SHARING ON
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set_global_assignment -name GENERATE_SVF_FILE OFF
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set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name NUM_PARALLEL_PROCESSORS 2
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set_global_assignment -name HYBRID_FLOW_NEW_EXTRACTOR ON
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#--------------------------------------------------------------------------
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# Pin constraints
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#--------------------------------------------------------------------------
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# Clocking.
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#------------------------------------------
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# CPLD's PLL reference clock.
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set_location_assignment PIN_H6 -to PLL_REF_CLK
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set_location_assignment PIN_G5 -to "PLL_REF_CLK(n)"
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set_instance_assignment -name IO_STANDARD "DIFFERENTIAL LVPECL" -to PLL_REF_CLK
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# Reliable clock (100 MHz).
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set_location_assignment PIN_H4 -to CLK_100
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set_location_assignment PIN_H5 -to "CLK_100(n)"
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set_instance_assignment -name IO_STANDARD "DIFFERENTIAL LVPECL" -to CLK_100
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# Power supply clocks.
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set_location_assignment PIN_H8 -to PWR_SUPPLY_CLK_CORE
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set_location_assignment PIN_H9 -to PWR_SUPPLY_CLK_DDR4_S
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set_location_assignment PIN_G12 -to PWR_SUPPLY_CLK_DDR4_N
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set_location_assignment PIN_L13 -to PWR_SUPPLY_CLK_0P9V
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set_location_assignment PIN_G13 -to PWR_SUPPLY_CLK_1P8V
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set_location_assignment PIN_K10 -to PWR_SUPPLY_CLK_2P5V
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set_location_assignment PIN_J10 -to PWR_SUPPLY_CLK_3P3V
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set_location_assignment PIN_L12 -to PWR_SUPPLY_CLK_3P6V
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PWR_SUPPLY_CLK_0P9V
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PWR_SUPPLY_CLK_1P8V
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PWR_SUPPLY_CLK_2P5V
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PWR_SUPPLY_CLK_3P3V
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PWR_SUPPLY_CLK_3P6V
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PWR_SUPPLY_CLK_CORE
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PWR_SUPPLY_CLK_DDR4_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PWR_SUPPLY_CLK_DDR4_S
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# Oscillator power supply
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set_location_assignment PIN_L2 -to PWR_EN_5V_OSC_100
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set_location_assignment PIN_N2 -to PWR_EN_5V_OSC_122_88
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set_instance_assignment -name IO_STANDARD "2.5 V" -to PWR_EN_5V_OSC_100
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set_instance_assignment -name IO_STANDARD "2.5 V" -to PWR_EN_5V_OSC_122_88
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# Interfaces from/to RFSoC.
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#------------------------------------------
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# PL SPI slave interface.
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set_location_assignment PIN_G2 -to PL_CPLD_SCLK
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set_location_assignment PIN_F5 -to PL_CPLD_MOSI
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set_location_assignment PIN_F6 -to PL_CPLD_MISO
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set_location_assignment PIN_G1 -to PL_CPLD_CS_N[0]
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set_location_assignment PIN_G4 -to PL_CPLD_CS_N[1]
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set_instance_assignment -name IO_STANDARD "1.8 V" -to PL_CPLD_SCLK
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set_instance_assignment -name IO_STANDARD "1.8 V" -to PL_CPLD_MOSI
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set_instance_assignment -name IO_STANDARD "1.8 V" -to PL_CPLD_MISO
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set_instance_assignment -name IO_STANDARD "1.8 V" -to PL_CPLD_CS_N[0]
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set_instance_assignment -name IO_STANDARD "1.8 V" -to PL_CPLD_CS_N[1]
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# IRQ to PL.
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set_location_assignment PIN_F4 -to PL_CPLD_IRQ
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set_instance_assignment -name IO_STANDARD "1.8 V" -to PL_CPLD_IRQ
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# PS SPI slave interface.
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set_location_assignment PIN_E3 -to PS_CPLD_SCLK
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set_location_assignment PIN_E1 -to PS_CPLD_MOSI
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set_location_assignment PIN_F1 -to PS_CPLD_MISO
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set_location_assignment PIN_B1 -to PS_CPLD_CS_N[0]
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set_location_assignment PIN_C1 -to PS_CPLD_CS_N[1]
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set_location_assignment PIN_E4 -to PS_CPLD_CS_N[2]
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set_location_assignment PIN_D1 -to PS_CPLD_CS_N[3]
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set_instance_assignment -name IO_STANDARD "1.8-V" -to PS_CPLD_SCLK
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set_instance_assignment -name IO_STANDARD "1.8-V" -to PS_CPLD_MOSI
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set_instance_assignment -name IO_STANDARD "1.8-V" -to PS_CPLD_MISO
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set_instance_assignment -name IO_STANDARD "1.8-V" -to PS_CPLD_CS_N[0]
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set_instance_assignment -name IO_STANDARD "1.8-V" -to PS_CPLD_CS_N[1]
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set_instance_assignment -name IO_STANDARD "1.8-V" -to PS_CPLD_CS_N[2]
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set_instance_assignment -name IO_STANDARD "1.8-V" -to PS_CPLD_CS_N[3]
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# PL Interfaces to/from motherboard.
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#------------------------------------------
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# White Rabbit DAC SPI master interface.
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set_location_assignment PIN_A12 -to CLK_DB_SCLK
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set_location_assignment PIN_B13 -to CLK_DB_MOSI
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set_location_assignment PIN_D12 -to CLK_DB_MISO
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set_location_assignment PIN_D9 -to CLK_DB_CS_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CLK_DB_SCLK
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CLK_DB_MOSI
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CLK_DB_MISO
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CLK_DB_CS_N
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# iPASS interfaces.
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set_location_assignment PIN_A6 -to IPASS_SCL[0]
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set_location_assignment PIN_H2 -to IPASS_SCL[1]
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set_location_assignment PIN_A7 -to IPASS_SDA[0]
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set_location_assignment PIN_H3 -to IPASS_SDA[1]
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set_instance_assignment -name IO_STANDARD "1.8 V" -to IPASS_SCL[0]
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set_instance_assignment -name IO_STANDARD "1.8 V" -to IPASS_SCL[1]
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set_instance_assignment -name IO_STANDARD "1.8 V" -to IPASS_SDA[0]
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set_instance_assignment -name IO_STANDARD "1.8 V" -to IPASS_SDA[1]
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set_location_assignment PIN_B11 -to IPASS_PRESENT_N[0]
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set_location_assignment PIN_F8 -to IPASS_PRESENT_N[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to IPASS_PRESENT_N[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to IPASS_PRESENT_N[1]
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# QSFP LEDs.
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set_location_assignment PIN_E12 -to QSFP0_LED_ACTIVE[0]
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set_location_assignment PIN_F12 -to QSFP0_LED_ACTIVE[1]
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set_location_assignment PIN_E9 -to QSFP0_LED_ACTIVE[2]
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set_location_assignment PIN_J1 -to QSFP0_LED_ACTIVE[3]
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set_location_assignment PIN_F10 -to QSFP0_LED_LINK[0]
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set_location_assignment PIN_F9 -to QSFP0_LED_LINK[1]
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set_location_assignment PIN_N11 -to QSFP0_LED_LINK[2]
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set_location_assignment PIN_D13 -to QSFP0_LED_LINK[3]
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set_location_assignment PIN_M1 -to QSFP1_LED_ACTIVE[0]
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set_location_assignment PIN_N3 -to QSFP1_LED_ACTIVE[1]
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set_location_assignment PIN_L3 -to QSFP1_LED_ACTIVE[2]
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set_location_assignment PIN_K2 -to QSFP1_LED_ACTIVE[3]
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set_location_assignment PIN_M2 -to QSFP1_LED_LINK[0]
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set_location_assignment PIN_M3 -to QSFP1_LED_LINK[1]
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set_location_assignment PIN_K1 -to QSFP1_LED_LINK[2]
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set_location_assignment PIN_L1 -to QSFP1_LED_LINK[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to QSFP0_LED_ACTIVE[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to QSFP0_LED_ACTIVE[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to QSFP0_LED_ACTIVE[2]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP0_LED_ACTIVE[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to QSFP0_LED_LINK[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to QSFP0_LED_LINK[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to QSFP0_LED_LINK[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to QSFP0_LED_LINK[3]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP1_LED_ACTIVE[0]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP1_LED_ACTIVE[1]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP1_LED_ACTIVE[2]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP1_LED_ACTIVE[3]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP1_LED_LINK[0]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP1_LED_LINK[1]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP1_LED_LINK[2]
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set_instance_assignment -name IO_STANDARD "2.5 V" -to QSFP1_LED_LINK[3]
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# DIO direction control.
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set_location_assignment PIN_N12 -to DIO_DIRECTION_A[0]
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set_location_assignment PIN_N10 -to DIO_DIRECTION_A[1]
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set_location_assignment PIN_N9 -to DIO_DIRECTION_A[2]
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set_location_assignment PIN_M4 -to DIO_DIRECTION_A[3]
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set_location_assignment PIN_M5 -to DIO_DIRECTION_A[4]
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set_location_assignment PIN_N4 -to DIO_DIRECTION_A[5]
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set_location_assignment PIN_N5 -to DIO_DIRECTION_A[6]
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set_location_assignment PIN_N7 -to DIO_DIRECTION_A[7]
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set_location_assignment PIN_N8 -to DIO_DIRECTION_A[8]
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set_location_assignment PIN_M8 -to DIO_DIRECTION_A[9]
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set_location_assignment PIN_M9 -to DIO_DIRECTION_A[10]
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set_location_assignment PIN_M13 -to DIO_DIRECTION_A[11]
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set_location_assignment PIN_L5 -to DIO_DIRECTION_B[0]
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set_location_assignment PIN_L4 -to DIO_DIRECTION_B[1]
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set_location_assignment PIN_K5 -to DIO_DIRECTION_B[2]
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set_location_assignment PIN_J5 -to DIO_DIRECTION_B[3]
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set_location_assignment PIN_N6 -to DIO_DIRECTION_B[4]
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set_location_assignment PIN_M7 -to DIO_DIRECTION_B[5]
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set_location_assignment PIN_J6 -to DIO_DIRECTION_B[6]
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set_location_assignment PIN_K6 -to DIO_DIRECTION_B[7]
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set_location_assignment PIN_J7 -to DIO_DIRECTION_B[8]
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set_location_assignment PIN_K7 -to DIO_DIRECTION_B[9]
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set_location_assignment PIN_M12 -to DIO_DIRECTION_B[10]
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set_location_assignment PIN_M11 -to DIO_DIRECTION_B[11]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[8]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[9]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[10]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_A[11]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[8]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[9]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[10]
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to DIO_DIRECTION_B[11]
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# PS Interfaces to/from motherboard.
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#------------------------------------------
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# LMK04832 SPI master interface.
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set_location_assignment PIN_J9 -to LMK32_SCLK
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set_location_assignment PIN_H13 -to LMK32_MOSI
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set_location_assignment PIN_L11 -to LMK32_MISO
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set_location_assignment PIN_J13 -to LMK32_CS_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to LMK32_SCLK
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to LMK32_MOSI
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to LMK32_MISO
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to LMK32_CS_N
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# TPM 2.0 SPI master interface.
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set_location_assignment PIN_D11 -to TPM_SCLK
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set_location_assignment PIN_E10 -to TPM_MOSI
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set_location_assignment PIN_C13 -to TPM_MISO
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set_location_assignment PIN_L10 -to TPM_CS_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TPM_SCLK
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TPM_MOSI
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TPM_MISO
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TPM_CS_N
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# Phase DAC SPI master interface.
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set_location_assignment PIN_K8 -to PHASE_DAC_SCLK
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set_location_assignment PIN_J8 -to PHASE_DAC_MOSI
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set_location_assignment PIN_M10 -to PHASE_DAC_CS_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHASE_DAC_SCLK
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set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHASE_DAC_MOSI
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PHASE_DAC_CS_N
|
|
|
|
# DB0 TX/RX LEDS per chan
|
|
#-------------------------------------------
|
|
set_location_assignment PIN_A11 -to CH0_TX_LED[0]
|
|
set_location_assignment PIN_C10 -to CH0_RX_LED[0]
|
|
set_location_assignment PIN_A9 -to CH0_RX2_LED[0]
|
|
set_location_assignment PIN_E8 -to CH1_TX_LED[0]
|
|
set_location_assignment PIN_D8 -to CH1_RX_LED[0]
|
|
set_location_assignment PIN_A8 -to CH1_RX2_LED[0]
|
|
set_location_assignment PIN_C9 -to CH2_TX_LED[0]
|
|
set_location_assignment PIN_A10 -to CH2_RX_LED[0]
|
|
set_location_assignment PIN_B10 -to CH2_RX2_LED[0]
|
|
set_location_assignment PIN_K12 -to CH3_TX_LED[0]
|
|
set_location_assignment PIN_K11 -to CH3_RX_LED[0]
|
|
set_location_assignment PIN_J12 -to CH3_RX2_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH0_TX_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH0_RX_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH0_RX2_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH1_TX_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH1_RX_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH1_RX2_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH2_TX_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH2_RX_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH2_RX2_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CH3_TX_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CH3_RX_LED[0]
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CH3_RX2_LED[0]
|
|
|
|
# DB0 TX/RX LEDS per chan
|
|
#-------------------------------------------
|
|
set_location_assignment PIN_D6 -to CH0_TX_LED[1]
|
|
set_location_assignment PIN_E6 -to CH0_RX_LED[1]
|
|
set_location_assignment PIN_A4 -to CH0_RX2_LED[1]
|
|
set_location_assignment PIN_A5 -to CH1_TX_LED[1]
|
|
set_location_assignment PIN_A3 -to CH1_RX_LED[1]
|
|
set_location_assignment PIN_B2 -to CH1_RX2_LED[1]
|
|
set_location_assignment PIN_B3 -to CH2_TX_LED[1]
|
|
set_location_assignment PIN_B6 -to CH2_RX_LED[1]
|
|
set_location_assignment PIN_B5 -to CH2_RX2_LED[1]
|
|
set_location_assignment PIN_E13 -to CH3_TX_LED[1]
|
|
set_location_assignment PIN_G10 -to CH3_RX_LED[1]
|
|
set_location_assignment PIN_G9 -to CH3_RX2_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH0_TX_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH0_RX_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH0_RX2_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH1_TX_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH1_RX_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH1_RX2_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH2_TX_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH2_RX_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "1.8-V" -to CH2_RX2_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CH3_TX_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CH3_RX_LED[1]
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to CH3_RX2_LED[1]
|
|
|
|
# Miscellaneous.
|
|
#------------------------------------------
|
|
|
|
# Power supply clocks switch.
|
|
set_location_assignment PIN_J2 -to PS_CLK_ON_CPLD
|
|
set_instance_assignment -name IO_STANDARD "2.5 V" -to PS_CLK_ON_CPLD
|
|
|
|
# iPASS misc.
|
|
set_location_assignment PIN_B12 -to IPASS_POWER_DISABLE
|
|
set_location_assignment PIN_C11 -to IPASS_POWER_EN_FAULT[0]
|
|
set_location_assignment PIN_C12 -to IPASS_POWER_EN_FAULT[1]
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to IPASS_POWER_DISABLE
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to IPASS_POWER_EN_FAULT[0]
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to IPASS_POWER_EN_FAULT[1]
|
|
|
|
# PCIe reset to FPGA.
|
|
set_location_assignment PIN_A2 -to PCIE_RESET
|
|
set_instance_assignment -name IO_STANDARD "1.8 V" -to PCIE_RESET
|
|
|
|
# TPM reset.
|
|
set_location_assignment PIN_K13 -to TPM_RESET_n
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to TPM_RESET_n
|
|
|
|
# File list.
|
|
set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 00000000
|
|
set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE COMP IMAGE"
|
|
set_global_assignment -name EN_USER_IO_WEAK_PULLUP OFF
|
|
set_global_assignment -name EN_SPI_IO_WEAK_PULLUP OFF
|
|
|
|
set_global_assignment -name VHDL_FILE ../ip/cmi/PcieCmiWrapper.vhd
|
|
set_global_assignment -name VHDL_FILE ../ip/cmi/PcieCmi.vhd
|
|
set_global_assignment -name QSYS_FILE ../ip/clkctrl/clkctrl.qsys
|
|
set_global_assignment -name QSYS_FILE ../ip/on_chip_flash/on_chip_flash.qsys
|
|
set_global_assignment -name SDC_FILE ../common/common.sdc
|
|
set_global_assignment -name SDC_FILE ../x440/mb_cpld.sdc
|
|
set_global_assignment -name VERILOG_FILE ../x440/mb_cpld.v -new_extractor
|
|
set_global_assignment -name VERILOG_FILE ../x440/led_control.v
|
|
set_global_assignment -name VERILOG_FILE ../common/reconfig_engine.v
|
|
set_global_assignment -name VERILOG_FILE ../common/ctrlport_to_spi.v
|
|
set_global_assignment -name VERILOG_FILE ../common/pl_cpld_regs.v
|
|
set_global_assignment -name VERILOG_FILE ../common/pwr_supply_clk_gen.v
|
|
set_global_assignment -name VERILOG_FILE ../common/ps_cpld_regs.v
|
|
set_global_assignment -name VERILOG_FILE ../common/ps_power_regs.v
|
|
set_global_assignment -name VERILOG_FILE ../common/reset_generator.v
|
|
set_global_assignment -name VERILOG_FILE ../common/spi_slave_to_ctrlport_master.v
|
|
set_global_assignment -name VERILOG_FILE ../common/spi_slave.v
|
|
set_global_assignment -name QIP_FILE ../ip/pll/pll.qip
|
|
set_global_assignment -name VERILOG_FILE ../../../../lib/control/synchronizer_impl.v
|
|
set_global_assignment -name VERILOG_FILE ../../../../lib/control/synchronizer.v
|
|
set_global_assignment -name SYSTEMVERILOG_FILE ../../../../lib/rfnoc/core/ctrlport_if.sv -new_extractor
|
|
set_global_assignment -name SYSTEMVERILOG_FILE ../../../../lib/rfnoc/core/ctrlport_pkg.sv -new_extractor
|
|
set_global_assignment -name SYSTEMVERILOG_FILE ../../../../lib/rfnoc/utils/ctrlport_if_splitter.sv -new_extractor
|
|
set_global_assignment -name SYSTEMVERILOG_FILE ../../../../lib/rfnoc/utils/ctrlport_if_terminator.sv -new_extractor
|
|
set_global_assignment -name SYSTEMVERILOG_FILE ../../../../lib/rfnoc/utils/ctrlport_splitter.sv -new_extractor
|
|
set_global_assignment -name SYSTEMVERILOG_FILE ../../../../lib/rfnoc/utils/ctrlport_terminator.sv -new_extractor
|
|
set_global_assignment -name VERILOG_FILE ../../../../lib/wb_spi/rtl/verilog/spi_top.v
|
|
set_global_assignment -name VERILOG_FILE ../../../../lib/wb_spi/rtl/verilog/spi_shift.v
|
|
set_global_assignment -name VERILOG_FILE ../../../../lib/wb_spi/rtl/verilog/spi_defines.v
|
|
set_global_assignment -name VERILOG_FILE ../../../../lib/wb_spi/rtl/verilog/spi_clgen.v
|
|
set_global_assignment -name VERILOG_FILE ../../../../lib/control/pulse_synchronizer.v
|
|
set_global_assignment -name VERILOG_FILE ../../../../lib/control/handshake.v
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/vivado_ipi/axi_bitq/bitq_fsm.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/vivado_ipi/axi_bitq/axi_bitq.vhd
|
|
set_global_assignment -name SOURCE_FILE db/mb_cpld.cmp.rdb
|
|
set_global_assignment -name PARTITION_NETLIST_TYPE POST_FIT -section_id "PcieCmi:PcieCmix"
|
|
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id "PcieCmi:PcieCmix"
|
|
set_global_assignment -name PARTITION_COLOR 52377 -section_id "PcieCmi:PcieCmix"
|
|
set_global_assignment -name PARTITION_IMPORT_FILE ../../ip/cmi/PcieCmi.qxp -section_id "PcieCmi:PcieCmix"
|
|
set_global_assignment -name PARTITION_LAST_IMPORTED_FILE ip/cmi/PcieCmi.qxp -section_id "PcieCmi:PcieCmix"
|
|
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|
|
set_instance_assignment -name PARTITION_HIERARCHY pciec_5b6b1 -to "PcieCmiWrapper:pcie_cmi_inst|PcieCmi:PcieCmix" -section_id "PcieCmi:PcieCmix"
|