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x300: add front-panel GPIO source control

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Adds a ZPU register to control the FP GPIO source. These are 2bits
per GPIO pin, totalling 24 bits. 0 corresponds to RF-A, 1 corresponds
to RF-B. The following Python code will control the upper 6 bits of the
front-panel GPIO from the B-side radio on an X300:

>>> import uhd
>>> U = uhd.usrp.MultiUSRP("type=x300")
>>> U.get_gpio_src_banks()
['FP0']
>>> U.get_gpio_src("FP0")
['RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA',
'RFA', 'RFA']
>>> U.set_gpio_src("FP0", ['RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA',
                           'RFB', 'RFB', 'RFB', 'RFB', 'RFB', 'RFB'])
>>> U.get_gpio_src("FP0")
['RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFA', 'RFB', 'RFB', 'RFB', 'RFB',
'RFB', 'RFB']
>>> # Make all GPIOs outputs:
>>> U.set_gpio_attr("FP0A", "DDR", 0xFFF)
>>> U.set_gpio_attr("FP0B", "DDR", 0xFFF)
>>> # Control all GPIOs from software (not ATR):
>>> U.set_gpio_attr("FP0A", "CTRL", 0x000)
>>> U.set_gpio_attr("FP0B", "CTRL", 0x000)
>>> # Bottom 3 pins go high from radio A
>>> U.set_gpio_attr("FP0A", "OUT", 0x007)
>>> # Top 3 pins go high from radio B
>>> U.set_gpio_attr("FP0B", "OUT", 0xE00)

Amends the gpio.cpp example to allow switching the source.

Co-authored-by: Brent Stapleton <brent.stapleton@ettus.com>


Original-commit: d7304cc724de43b0d61d5b9d61a528d58898f004
This commit is contained in:
eklai
2020-02-18 07:21:24 -06:00
committed by atrnati
co-authored by Brent Stapleton
parent 59adae6252
commit f51c7aa780
2 changed files with 45 additions and 7 deletions
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top/x300/bus_int.v
+12 -1
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@@ -45,6 +45,8 @@ module bus_int #(
input SFPP0_ModAbs, input SFPP0_TxFault, input SFPP0_RxLOS, inout SFPP0_RS0, inout SFPP0_RS1,
// SFP+ 1
input SFPP1_ModAbs, input SFPP1_TxFault, input SFPP1_RxLOS, inout SFPP1_RS0, inout SFPP1_RS1,
// Front-panel GPIO source
output [23:0] fp_gpio_src,
// Clock control and status
input [7:0] clock_status, output [7:0] clock_control, output [31:0] ref_freq, output ref_freq_changed,
// SFP+ 0 data stream
@@ -153,7 +155,7 @@ module bus_int #(
localparam SR_SPI = 8'd32;
localparam SR_ETHINT0 = 8'd40;
localparam SR_ETHINT1 = 8'd56;
//localparam SR_NEXT_ADDR = 8'd72;
localparam SR_FP_GPIO_SRC = 8'd72;
localparam SR_BASE_TIME = 8'd100;
localparam RB_COUNTER = 8'd00;
@@ -169,6 +171,7 @@ module bus_int #(
localparam RB_GIT_HASH = 8'd10;
localparam RB_XADC_VALS = 8'd11;
localparam RB_NUM_TIMEKEEPERS = 8'd12;
localparam RB_FP_GPIO_SRC = 8'd13;
localparam COMPAT_MAJOR = 16'h0026;
localparam COMPAT_MINOR = 16'h0000;
@@ -433,6 +436,7 @@ module bus_int #(
`endif
RB_GIT_HASH: rb_data = `GIT_HASH;
RB_XADC_VALS: rb_data = xadc_readback;
RB_FP_GPIO_SRC: rb_data = fp_gpio_src;
SR_BASE_TIME: begin
rb_data = radio_time[31:0];
radio_time_hi_ld = 1'b1;
@@ -604,6 +608,13 @@ module bus_int #(
assign SFPP1_RS0 = sfpp1_ctrl[0] ? 1'b0 : 1'bz;
assign SFPP1_RS1 = sfpp1_ctrl[1] ? 1'b0 : 1'bz;
// Front-panel GPIO source - Each pin is allocated 2 bits
setting_reg #(.my_addr(SR_FP_GPIO_SRC), .awidth(SR_AWIDTH), .width(24)) set_fp_gpio_src
(.clk(clk), .rst(reset),
.strobe(set_stb), .addr(set_addr), .in(set_data),
.out(fp_gpio_src));
// ////////////////////////////////////////////////////////////////
// ETH interfaces