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fpga: x400: cpld: Add manufacturing support

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This commit enables a special personality on the X410 motherboard CPLD required
for NI manufacturing purposes only.


Original-commit: 6fd9f37e1cc16bedaafbbf3f013e78bb4869de6c
This commit is contained in:
Humberto Jimenez
2021-12-01 10:51:07 -06:00
committed by Wade Fife
parent 4082066a6f
commit ed8a03b9b0
4 changed files with 27 additions and 7 deletions
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top/x400/cpld/Makefile
+6 -1
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@@ -24,6 +24,7 @@
# Target specific variables
X410_CPLD_10M04: DEFS = VARIANT_`echo $(10M04_ID) | cut -c1-5`=1
X410_CPLD_10M08: DEFS = VARIANT_`echo $(10M08_ID) | cut -c1-5`=1
X410_CPLD_MFG_10M08: DEFS = VARIANT_`echo $(10M08_ID) | cut -c1-5`=1 MFG_SUPPORT=1
TARGET = bin
TOP ?= mb_cpld
@@ -68,11 +69,15 @@ X410_CPLD_10M08:
$(call quartus_build,$(10M08_ID),$(DEFS))
$(call post_build,"usrp_x410_cpld_`echo $(10M08_ID) | cut -c1-5 | tr A-Z a-z`")
X410_CPLD_IP: ##Build IPs only, needed for simulation.
@# Building only X410_CPLD_10M04 IP
$(call quartus_ip,$(10M04_ID),$(DEFS))
# Internal manufacturing test image.
X410_CPLD_MFG_10M08:
$(call quartus_build,$(10M08_ID),$(DEFS))
$(call post_build,"usrp_x410_cpld_mfg_`echo $(10M08_ID) | cut -c1-5 | tr A-Z a-z`")
clean: ##Clean up all target build outputs.
@echo -ne "\nCleaning targets and git repo...\n";
@rm -rf build-X410_CPLD*
top/x400/cpld/mb_cpld.v
+16 -1
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@@ -252,6 +252,19 @@ module mb_cpld #(
// Power Supply Clock
//---------------------------------------------------------------------------
`ifdef MFG_SUPPORT
assign PWR_SUPPLY_CLK_CORE = 1'b0;
assign PWR_SUPPLY_CLK_DDR4_S = 1'b0;
assign PWR_SUPPLY_CLK_DDR4_N = 1'b0;
assign PWR_SUPPLY_CLK_0P9V = 1'b0;
assign PWR_SUPPLY_CLK_1P8V = 1'b0;
assign PWR_SUPPLY_CLK_2P5V = 1'b0;
assign PWR_SUPPLY_CLK_3P3V = 1'b0;
assign PWR_SUPPLY_CLK_3P6V = 1'b0;
`else
// Frequency definitions
localparam SOUCE_CLOCK_FREQUENCY = 100_000_000;
localparam TARGET_FREQUENCY_350k = 350_000;
@@ -323,6 +336,8 @@ module mb_cpld #(
assign PWR_SUPPLY_CLK_3P3V = pwr_supply_clk_1M;
assign PWR_SUPPLY_CLK_3P6V = pwr_supply_clk_1M;
`endif
//---------------------------------------------------------------------------
// PL Interfaces
//---------------------------------------------------------------------------
@@ -1025,7 +1040,7 @@ endmodule
// </info>
// <value name="PS_CPLD_SIGNATURE" integer="0x0A522D27"/>
// <value name="PL_CPLD_SIGNATURE" integer="0x3FDC5C47"/>
// <value name="CPLD_REVISION" integer="0x21111614"/>
// <value name="CPLD_REVISION" integer="0x21111615"/>
// <value name="OLDEST_CPLD_REVISION" integer="0x20122114"/>
// </enumeratedtype>
// </group>
top/x400/cpld/regmap/constants_regmap_utils.vh
+1 -1
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@@ -24,5 +24,5 @@
localparam CONSTANTS_ENUM_SIZE = 4;
localparam PS_CPLD_SIGNATURE = 'hA522D27; // CONSTANTS_ENUM:PS_CPLD_SIGNATURE
localparam OLDEST_CPLD_REVISION = 'h20122114; // CONSTANTS_ENUM:OLDEST_CPLD_REVISION
localparam CPLD_REVISION = 'h21111614; // CONSTANTS_ENUM:CPLD_REVISION
localparam CPLD_REVISION = 'h21111615; // CONSTANTS_ENUM:CPLD_REVISION
localparam PL_CPLD_SIGNATURE = 'h3FDC5C47; // CONSTANTS_ENUM:PL_CPLD_SIGNATURE
top/x400/doc/X4XX_FPGA_right.htm
+2 -2
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@@ -2338,9 +2338,9 @@ This enumeration is used to create the constants held in the basic registers.
<tr valign="top">
<td class='value'>554767892</td>
<td class='value'>554767893</td>
<td class='l'>0x21111614</td>
<td class='l'>0x21111615</td>
<td class="l" style="text-align: left;">
<p class="name"><a name='CONSTANTS_REGMAP|CONSTANTS_ENUM|CPLD_REVISION'></a>CPLD_REVISION</p>