fgpa: rfnoc: Set Replay memory transactions to 2 KiB

This sets the Replay block's counter width so that memory bursts are
up to 2 KiB. Previously, the counter width was fixed, which meant
that wide memories would require especially large buffers and could
exceed the 4 KiB limit imposed by AXI.


Original-commit: 08d03f881e2767f45ab7fc18c8003c9739b0ffb2
This commit is contained in:
Wade Fife
2022-03-09 07:57:21 -06:00
parent 0ae661c853
commit df7fd28589
2 changed files with 15 additions and 7 deletions
@@ -177,9 +177,9 @@ module axis_replay #(
// Log base 2 of the depth of the input and output FIFOs to use. The FIFOs
// should be large enough to store more than a complete burst
// (MEM_BURST_LEN). A size of 9 (512 64-bit words) is one 36-kbit BRAM.
localparam REC_FIFO_ADDR_WIDTH = 9; // Log2 of input/record FIFO size
localparam PLAY_FIFO_ADDR_WIDTH = 9; // Log2 of output/playback FIFO size
localparam HDR_FIFO_ADDR_WIDTH = 5; // Log2 of output/time FIFO size
localparam REC_FIFO_ADDR_WIDTH = MEM_COUNT_W+1; // Log2 of input/record FIFO size
localparam PLAY_FIFO_ADDR_WIDTH = MEM_COUNT_W+1; // Log2 of output/playback FIFO size
localparam HDR_FIFO_ADDR_WIDTH = 5; // Log2 of output/time FIFO size
//
// Amount of data to buffer before writing to RAM. It must not exceed
// 2**MEM_COUNT_W (the maximum count allowed by an AXI master).
@@ -322,8 +322,12 @@ module rfnoc_block_replay #(
// Replay Block Instances
//---------------------------------------------------------------------------
// Width of memory transfer count. Always 8 for AXI4.
localparam MEM_COUNT_W = 8;
// Width of memory transfer count. This controls the maximum burst length
// supported by the Replay block. For AXI compatibility, it must be 8 or less
// and should not represent more than 4 KiB. Here we set it to 2 KiB by
// default.
localparam MEM_COUNT_W = (MEM_DATA_W <= 64) ? 8 : // Max width allowed
$clog2(2048 / (MEM_DATA_W/8)); // 2 KiB
genvar i;
generate
@@ -417,6 +421,10 @@ module rfnoc_block_replay #(
//
//-----------------------------------------------------------------------
// Resize the count signals, in case they are not 8 bit.
wire [7:0] write_count_8 = write_count;
wire [7:0] read_count_8 = read_count;
axi_dma_master #(
.AWIDTH (MEM_ADDR_W),
.DWIDTH (MEM_DATA_W)
@@ -485,7 +493,7 @@ module rfnoc_block_replay #(
// Interface for Write transactions
//
.write_addr (write_addr),
.write_count (write_count),
.write_count (write_count_8),
.write_ctrl_valid (write_ctrl_valid),
.write_ctrl_ready (write_ctrl_ready),
.write_data (write_data),
@@ -496,7 +504,7 @@ module rfnoc_block_replay #(
// Interface for Read transactions
//
.read_addr (read_addr),
.read_count (read_count),
.read_count (read_count_8),
.read_ctrl_valid (read_ctrl_valid),
.read_ctrl_ready (read_ctrl_ready),
.read_data (read_data),